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<h2 id="aseries-socs"><i>A</i> series SoCs</h2> <p>The <i>A</i> series is a family of <a href="/facts/System_on_a_chip/1RVvVe6N">SoCs</a> used in the <a href="/facts/IPhone/h5WeKRl9">iPhone</a>, certain <a href="/facts/IPad/Ql67x0Dw">iPad</a> models (including iPad Mini and entry-level iPad), and the <a href="/facts/Apple_TV/FHVJqBCw">Apple TV</a>. <i>A</i>-series chips were also used in the discontinued <a href="/facts/IPod_Touch/PRJabx51">iPod Touch</a> line and the original <a href="/facts/HomePod/ToJVXQMc">HomePod</a>. They integrate one or more <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> processing cores (<a href="/facts/CPU/Jxp1bqMV">CPU</a>), a graphics processing unit (<a href="/facts/GPU/PTK1RQVp">GPU</a>), <a href="/facts/CPU_cache/x8BYFcdv">cache memory</a> and other electronics necessary to provide mobile computing functions within a single physical package.<a class="footnote-ref" id="fnref:4" href="#fn:4"><sup>4</sup></a> </p> <table><tbody><tr><th>Evolution of Apple <i>A</i> series</th></tr><tr><td><table><tbody><tr><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A4/BBj4htyY">A4</a>March 12, 2010 – September 10, 2013</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A5/qr0k2aFB">A5</a>March 2, 2011 – October 4, 2016</td><td colspan="2"></td><td colspan="2"></td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td colspan="2"></td><td colspan="2"></td><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A5X/8tmojSXE">A5X</a>March 7 – October 23, 2012</td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A6/vbIa3hBp">A6</a>September 12, 2012 – September 9, 2015</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A6X/1HT0QhNk">A6X</a>October 23, 2012 – October 22, 2013March 18 – October 16, 2014</td></tr><tr><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="2"></td><td colspan="2"></td><td colspan="2"></td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td><td colspan="2"></td><td colspan="2"></td><td colspan="2"></td><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A7/WIaQPsQe">A7</a>September 10, 2013 – March 21, 2017</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="2"></td><td colspan="2"></td><td colspan="2"></td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td><td colspan="2"></td><td colspan="2"></td><td colspan="2"></td><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A8/8hdFEwue">A8</a>September 9, 2014 – October 18, 2022</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A8X/tuoRAW24">A8X</a>October 16, 2014 – March 21, 2017</td></tr><tr><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A9/0fvStBD5">A9</a>September 9, 2015 – September 12, 2018 </td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A9X/JqoASWu4">A9X</a>November 9, 2015 – June 5, 2017</td></tr><tr><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A10/HVRIKloF">A10 Fusion</a>September 7, 2016 – May 10, 2022</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A10X/27LwyX41">A10X Fusion</a>June 5, 2017 – April 20, 2021</td></tr><tr><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A11/WqYEN1a8">A11 Bionic</a>September 12, 2017 – April 15, 2020</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A12/gNpjauR6">A12 Bionic</a>September 12, 2018 – October 18, 2022</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A12X/yDED2zVc">A12X Bionic</a>October 30, 2018 – March 18, 2020</td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A13/2h3wVEU1">A13 Bionic</a>September 10, 2019 – present</td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A12Z/oDUTeP3z">A12Z Bionic</a>March 18, 2020 – April 20, 2021</td></tr><tr><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A14/gcJPfsnJ">A14 Bionic</a>September 15, 2020 – March 4, 2025</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A15/gegtVIDT">A15 Bionic</a>September 14, 2021 – present</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A16/MCduVutl">A16 Bionic</a>September 7, 2022 – present</td><td colspan="2"></td><td colspan="2"></td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td colspan="2"></td><td colspan="2"></td><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A17/tf5mmo8D">A17 Pro</a>September 12, 2023 – present</td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A18/zSk5E19c">A18</a>September 9, 2024 – present</td><td colspan="2"></td><td colspan="2"></td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td colspan="2"></td><td colspan="2"></td><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_A18/zSk5E19c">A18 Pro</a>September 9, 2024 – present</td></tr><tr></tr></tbody></table></td></tr></tbody></table> <h3>Apple A4</h3> <p class="note">Main article: <a href="/facts/Apple_A4/BBj4htyY">Apple A4</a></p> <p>The Apple A4 is a <a href="/facts/Package_on_a_package/HGIeIDVl">PoP</a> SoC manufactured by <a href="/facts/Samsung/oNXUwDjn">Samsung</a>, the first SoC Apple designed in-house.<a class="footnote-ref" id="fnref:5" href="#fn:5"><sup>5</sup></a> It combines an <a href="/facts/ARM_architecture/SALsYA79">ARM</a> <a href="/facts/ARM_Cortex-A8/vM6beXwg">Cortex-A8</a> CPU – also used in Samsung's S5PC110A01 SoC<a class="footnote-ref" id="fnref:6" href="#fn:6"><sup>6</sup></a><a class="footnote-ref" id="fnref:7" href="#fn:7"><sup>7</sup></a> – and a <a href="/facts/PowerVR/lTtwow8j">PowerVR SGX 535</a> <a href="/facts/Graphics_processing_unit/PTK1RQVp">graphics processor</a> (GPU),<a class="footnote-ref" id="fnref:8" href="#fn:8"><sup>8</sup></a><a class="footnote-ref" id="fnref:9" href="#fn:9"><sup>9</sup></a><a class="footnote-ref" id="fnref:10" href="#fn:10"><sup>10</sup></a> all built on Samsung's 45-nanometer silicon chip fabrication process.<a class="footnote-ref" id="fnref:11" href="#fn:11"><sup>11</sup></a><a class="footnote-ref" id="fnref:12" href="#fn:12"><sup>12</sup></a> The design emphasizes power efficiency.<a class="footnote-ref" id="fnref:13" href="#fn:13"><sup>13</sup></a> The A4 commercially debuted in 2010, in Apple's iPad <a href="/facts/Tablet_computer/6pGX2I7b">tablet</a>,<a class="footnote-ref" id="fnref:14" href="#fn:14"><sup>14</sup></a> and was later used in the <a href="/facts/IPhone_4/EWe0sE18">iPhone 4</a> smartphone,<a class="footnote-ref" id="fnref:15" href="#fn:15"><sup>15</sup></a> the <a href="/facts/IPod_Touch_(4th_generation)/HY3MYb0x">fourth-generation iPod Touch</a>, and the 2nd-generation <a href="/facts/Apple_TV/FHVJqBCw">Apple TV</a>.<a class="footnote-ref" id="fnref:16" href="#fn:16"><sup>16</sup></a> </p><p>The Cortex-A8 core used in the A4, dubbed <i><a href="/facts/Samsung_Hummingbird/VSMI3vDf">Hummingbird</a></i>, is thought to use performance improvements developed by Samsung in collaboration with chip designer <a href="/facts/Intrinsity/77vg9kq6">Intrinsity</a>, which was subsequently acquired by Apple<a class="footnote-ref" id="fnref:17" href="#fn:17"><sup>17</sup></a><a class="footnote-ref" id="fnref:18" href="#fn:18"><sup>18</sup></a> It can run at far higher clock rates than other Cortex-A8 designs yet remains fully compatible with the design provided by ARM.<a class="footnote-ref" id="fnref:19" href="#fn:19"><sup>19</sup></a> The A4 runs at different speeds in different products: 1 GHz in the first iPads,<a class="footnote-ref" id="fnref:20" href="#fn:20"><sup>20</sup></a> 800 MHz in the iPhone 4 and fourth-generation iPod Touch, and an undisclosed speed in the 2nd-generation Apple TV. </p><p>The A4's SGX535 GPU could theoretically push 35 million polygons per second and 500 million pixels per second, although real-world performance may be considerably less.<a class="footnote-ref" id="fnref:21" href="#fn:21"><sup>21</sup></a> Other performance improvements include additional <a href="/facts/CPU_cache/x8BYFcdv">L2 cache</a>. </p><p>The A4 processor package does not contain <a href="/facts/Random-access_memory/DuD4bxh6">RAM</a>, but supports <a href="/facts/Package_on_package/HGIeIDVl">PoP</a> installation. The 1st-generation iPad, <a href="/facts/IPod_Touch_4th_Generation/PRJabx51">fourth-generation iPod Touch</a>,<a class="footnote-ref" id="fnref:22" href="#fn:22"><sup>22</sup></a> and the 2nd-generation Apple TV<a class="footnote-ref" id="fnref:23" href="#fn:23"><sup>23</sup></a> have an A4 mounted with two low-power 128 MB <a href="/facts/DDR_SDRAM/N8UkI3zN">DDR SDRAM</a> <a href="/facts/Integrated_circuit/fjn6vg7C">chips</a> (totaling 256 MB), while the iPhone 4 has two 256 MB packages for a total of 512 MB.<a class="footnote-ref" id="fnref:24" href="#fn:24"><sup>24</sup></a><a class="footnote-ref" id="fnref:25" href="#fn:25"><sup>25</sup></a><a class="footnote-ref" id="fnref:26" href="#fn:26"><sup>26</sup></a> The RAM is connected to the processor using ARM's <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a>-wide <a href="/facts/ABMA_3_AXI/LXPA3SnW">AMBA 3 AXI</a> bus. To give the iPad high graphics bandwidth, the width of the RAM data bus is double that used in previous ARM11- and ARM9-based Apple devices.<a class="footnote-ref" id="fnref:27" href="#fn:27"><sup>27</sup></a> </p> <h3>Apple A5</h3> <p class="note">Main article: <a href="/facts/Apple_A5/qr0k2aFB">Apple A5</a></p> <p>The Apple A5 is an SoC manufactured by <a href="/facts/Samsung/oNXUwDjn">Samsung</a><a class="footnote-ref" id="fnref:28" href="#fn:28"><sup>28</sup></a> that replaced the <a href="/facts/Apple_A4/BBj4htyY">A4</a>. The chip commercially debuted with the release of Apple's <a href="/facts/IPad_2/WCuqxCPK">iPad 2</a> <a href="/facts/Tablet_computer/6pGX2I7b">tablet</a> in March 2011,<a class="footnote-ref" id="fnref:29" href="#fn:29"><sup>29</sup></a> followed by its release in the <a href="/facts/IPhone_4S/Wu68J786">iPhone 4S</a> <a href="/facts/Smartphone/cSIrBMWG">smartphone</a> later that year. Compared to the A4, the A5 <a href="/facts/CPU/Jxp1bqMV">CPU</a> "can do twice the work" and the <a href="/facts/Graphics_processing_unit/PTK1RQVp">GPU</a> has "up to nine times the graphics performance",<a class="footnote-ref" id="fnref:30" href="#fn:30"><sup>30</sup></a> according to Apple. </p><p>The A5 contains a dual-core <a href="/facts/ARM_Cortex-A9_MPCore/7frBGbbK">ARM Cortex-A9</a> CPU<a class="footnote-ref" id="fnref:31" href="#fn:31"><sup>31</sup></a> with ARM's advanced <a href="/facts/SIMD/gQHWQSpo">SIMD</a> extension, marketed as <a href="/facts/ARM_NEON/SALsYA79">NEON</a>, and a dual core <a href="/facts/PowerVR/lTtwow8j">PowerVR</a> SGX543MP2 GPU. This GPU can push between 70 and 80 million polygons/second and has a pixel fill rate of 2 billion pixels/second. The iPad 2's technical specifications page says the A5 is clocked at 1 GHz,<a class="footnote-ref" id="fnref:32" href="#fn:32"><sup>32</sup></a> though it can adjust its frequency to save battery life.<a class="footnote-ref" id="fnref:33" href="#fn:33"><sup>33</sup></a><a class="footnote-ref" id="fnref:34" href="#fn:34"><sup>34</sup></a> The clock speed of the unit used in the iPhone 4S is 800 MHz. Like the A4, the A5 process size is 45 nm.<a class="footnote-ref" id="fnref:35" href="#fn:35"><sup>35</sup></a> </p><p>An updated <a href="/facts/32_nm/CsdohJVh">32 nm</a> version of the A5 processor was used in the third-generation Apple TV, the <a href="/facts/IPod_Touch_(5th_generation)/wqoWSn5g">fifth-generation iPod Touch</a>, the iPad Mini, and the new version of iPad 2 (version iPad2,4).<a class="footnote-ref" id="fnref:36" href="#fn:36"><sup>36</sup></a> The chip in the Apple TV has one core locked.<a class="footnote-ref" id="fnref:37" href="#fn:37"><sup>37</sup></a><a class="footnote-ref" id="fnref:38" href="#fn:38"><sup>38</sup></a> Markings on the square package indicate that it is named <i>APL2498</i>, and in software, the chip is called <i>S5L8942</i>. The <a href="/facts/32_nanometer/CsdohJVh">32 nm</a> variant of the A5 provides around 15% better battery life during web browsing, 30% better when playing 3D games and about 20% better battery life during video playback.<a class="footnote-ref" id="fnref:39" href="#fn:39"><sup>39</sup></a> </p><p>In March 2013, Apple released an updated version of the 3rd-generation Apple TV (Rev A, model A1469) containing a smaller, single-core version of the A5 processor. Unlike the other A5 variants, this version of the A5 is not a PoP, having no stacked RAM. The chip is very small, just 6.1×6.2 mm, but as the decrease in size is not due to a decrease in feature size (it is still on a 32 nm fabrication process), this indicates that this A5 revision is of a new design.<a class="footnote-ref" id="fnref:40" href="#fn:40"><sup>40</sup></a> Markings tell that it is named <i>APL7498</i>, and in software, the chip is called <i>S5L8947</i>.<a class="footnote-ref" id="fnref:41" href="#fn:41"><sup>41</sup></a><a class="footnote-ref" id="fnref:42" href="#fn:42"><sup>42</sup></a> </p> <h3>Apple A5X</h3> <p class="note">Main article: <a href="/facts/Apple_A5X/8tmojSXE">Apple A5X</a></p> <p>The Apple A5X is an SoC announced on March 7, 2012, at the launch of the <a href="/facts/IPad_(3rd_generation)/d5cs2rmu">third-generation iPad</a>. It is a high-performance variant of the <a href="/facts/Apple_A5/qr0k2aFB">Apple A5</a>; Apple claims it has twice the graphics performance of the A5.<a class="footnote-ref" id="fnref:43" href="#fn:43"><sup>43</sup></a> It was superseded in the <a href="/facts/IPad_(4th_generation)/Qy2rPgfD">fourth-generation iPad</a> by the <a href="/facts/Apple_A6X/1HT0QhNk">Apple A6X</a> processor. </p><p>The A5X has a quad-core graphics unit (PowerVR SGX543MP4) instead of the previous dual-core as well as a quad-channel memory controller that provides a memory bandwidth of 12.8 GB/s, roughly three times more than in the A5. The added graphics cores and extra memory channels add up to a very large die size of 165 mm2,<a class="footnote-ref" id="fnref:44" href="#fn:44"><sup>44</sup></a> for example twice the size of <a href="/facts/Nvidia/8QfCgqbu">Nvidia</a> <a href="/facts/Tegra_3/qolVa8CJ">Tegra 3</a>.<a class="footnote-ref" id="fnref:45" href="#fn:45"><sup>45</sup></a> This is mainly due to the large PowerVR SGX543MP4 GPU. The clock frequency of the dual ARM Cortex-A9 cores have been shown to operate at the same 1 GHz frequency as in A5.<a class="footnote-ref" id="fnref:46" href="#fn:46"><sup>46</sup></a> The RAM in A5X is separate from the main CPU package.<a class="footnote-ref" id="fnref:47" href="#fn:47"><sup>47</sup></a> </p> <h3>Apple A6</h3> <p class="note">Main article: <a href="/facts/Apple_A6/vbIa3hBp">Apple A6</a></p> <p>The Apple A6 is a PoP SoC introduced on September 12, 2012, at the launch of the <a href="/facts/IPhone_5/MqsAXS2C">iPhone 5</a>, then a year later was inherited by its minor successor the <a href="/facts/IPhone_5C/nC17qvnn">iPhone 5C</a>. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the <a href="/facts/Apple_A5/qr0k2aFB">Apple A5</a>.<a class="footnote-ref" id="fnref:48" href="#fn:48"><sup>48</sup></a> It is 22% smaller and draws less power than the 45 nm A5.<a class="footnote-ref" id="fnref:49" href="#fn:49"><sup>49</sup></a> </p><p>The A6 is said to use a 1.3 GHz<a class="footnote-ref" id="fnref:50" href="#fn:50"><sup>50</sup></a> custom<a class="footnote-ref" id="fnref:51" href="#fn:51"><sup>51</sup></a> Apple-designed <a href="/facts/ARM_architecture/SALsYA79">ARMv7</a> based <a href="/facts/Multi-core_processor/ABNb65hQ">dual-core CPU</a>, called Swift,<a class="footnote-ref" id="fnref:52" href="#fn:52"><sup>52</sup></a> rather than a licensed CPU from ARM like in previous designs, and an integrated 266 MHz triple-core <a href="/facts/PowerVR/lTtwow8j">PowerVR</a> SGX 543MP3<a class="footnote-ref" id="fnref:53" href="#fn:53"><sup>53</sup></a> <a href="/facts/Graphics_processing_unit/PTK1RQVp">graphics processing unit</a> (GPU). The Swift core in the A6 uses a new tweaked instruction set, ARMv7s, featuring some elements of the <a href="/facts/ARM_Cortex-A15_MPCore/z1Vccoow">ARM Cortex-A15</a> such as support for the <a href="/facts/ARM_architecture/SALsYA79">Advanced SIMD v2</a>, and <a href="/facts/VFP_(instruction_set)/SALsYA79">VFPv4</a>.<a class="footnote-ref" id="fnref:54" href="#fn:54"><sup>54</sup></a> The A6 is manufactured by Samsung on a <a href="/facts/High-%25CE%25BA_dielectric/4E8qtXmp">high-κ</a> <a href="/facts/Metal_gate/vFzyEhb4">metal gate</a> (HKMG) 32 nm process.<a class="footnote-ref" id="fnref:55" href="#fn:55"><sup>55</sup></a> </p> <h3>Apple A6X</h3> <p class="note">Main article: <a href="/facts/Apple_A6X/1HT0QhNk">Apple A6X</a></p> <p>Apple A6X is an SoC introduced at the launch of the <a href="/facts/IPad_(4th_generation)/Qy2rPgfD">fourth-generation iPad</a> on October 23, 2012. It is a high-performance variant of the <a href="/facts/Apple_A6/vbIa3hBp">Apple A6</a>. Apple claims the A6X has twice the CPU performance and up to twice the graphics performance of its predecessor, the <a href="/facts/Apple_A5X/8tmojSXE">Apple A5X</a>.<a class="footnote-ref" id="fnref:56" href="#fn:56"><sup>56</sup></a> </p><p>Like the A6, this SoC continues to use the dual-core Swift CPU, but it has a new quad core GPU, quad channel memory and slightly higher 1.4 GHz CPU clock rate.<a class="footnote-ref" id="fnref:57" href="#fn:57"><sup>57</sup></a> It uses an integrated quad-core <a href="/facts/PowerVR/lTtwow8j">PowerVR</a> SGX 554MP4 <a href="/facts/Graphics_processing_unit/PTK1RQVp">graphics processing unit</a> (GPU) running at 300 MHz and a quad-channel <a href="/facts/Memory_controller/tHq2zlws">memory subsystem</a>.<a class="footnote-ref" id="fnref:58" href="#fn:58"><sup>58</sup></a><a class="footnote-ref" id="fnref:59" href="#fn:59"><sup>59</sup></a> Compared to the A6 the A6X is 30% larger, but it continues to be manufactured by Samsung on a <a href="/facts/High-%25CE%25BA_dielectric/4E8qtXmp">high-κ</a> <a href="/facts/Metal_gate/vFzyEhb4">metal gate</a> (HKMG) 32 nm process.<a class="footnote-ref" id="fnref:60" href="#fn:60"><sup>60</sup></a> </p> <h3>Apple A7</h3> <p class="note">Main article: <a href="/facts/Apple_A7/WIaQPsQe">Apple A7</a></p> <p>The Apple A7 is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> PoP SoC whose first appearance was in the <a href="/facts/IPhone_5S/5adgnjro">iPhone 5S</a>, which was introduced on September 10, 2013. The chip would also be used in the <a href="/facts/IPad_Air/FzUDtnv8">iPad Air</a>, <a href="/facts/IPad_Mini_2/1jDWPe6Q">iPad Mini 2</a> and <a href="/facts/IPad_Mini_3/8yydmoeG">iPad Mini 3</a>. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A6.<a class="footnote-ref" id="fnref:61" href="#fn:61"><sup>61</sup></a> The Apple A7 chip is the first 64-bit chip to be used in a smartphone and later a tablet computer.<a class="footnote-ref" id="fnref:62" href="#fn:62"><sup>62</sup></a> </p><p>The A7 features an Apple-designed 1.3<a class="footnote-ref" id="fnref:63" href="#fn:63"><sup>63</sup></a>–1.4<a class="footnote-ref" id="fnref:64" href="#fn:64"><sup>64</sup></a> GHz 64-bit<a class="footnote-ref" id="fnref:65" href="#fn:65"><sup>65</sup></a> <a href="/facts/ARMv8/SALsYA79">ARMv8</a>-A<a class="footnote-ref" id="fnref:66" href="#fn:66"><sup>66</sup></a><a class="footnote-ref" id="fnref:67" href="#fn:67"><sup>67</sup></a> dual-core CPU,<a class="footnote-ref" id="fnref:68" href="#fn:68"><sup>68</sup></a> called Cyclone,<a class="footnote-ref" id="fnref:69" href="#fn:69"><sup>69</sup></a> and an integrated <a href="/facts/PowerVR/lTtwow8j">PowerVR G6430</a> GPU in a four cluster configuration.<a class="footnote-ref" id="fnref:70" href="#fn:70"><sup>70</sup></a> The ARMv8-A architecture doubles the number of <a href="/facts/Processor_register/32RvbUdz">registers</a> of the A7 compared to the A6.<a class="footnote-ref" id="fnref:71" href="#fn:71"><sup>71</sup></a> It now has 31 general-purpose registers that are each <a href="/facts/64-bit_computing/AgvkQHkM">64-bits</a> wide and 32 floating-point/<a href="/facts/ARM_NEON/SALsYA79">NEON</a> registers that are each 128-bits wide.<a class="footnote-ref" id="fnref:72" href="#fn:72"><sup>72</sup></a> The A7 is manufactured by Samsung on a <a href="/facts/High-%25CE%25BA_dielectric/4E8qtXmp">high-κ</a> <a href="/facts/Metal_gate/vFzyEhb4">metal gate</a> (HKMG) 28 <a href="/facts/Nanometer/a98sjHyu">nm</a> process<a class="footnote-ref" id="fnref:73" href="#fn:73"><sup>73</sup></a> and the chip includes over 1 billion <a href="/facts/Transistor_count/1oDVlhAY">transistors</a> on a die 102 mm2 in size.<a class="footnote-ref" id="fnref:74" href="#fn:74"><sup>74</sup></a> </p> <h3>Apple A8</h3> <p class="note">Main article: <a href="/facts/Apple_A8/8hdFEwue">Apple A8</a></p> <p>The Apple A8 is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> PoP SoC manufactured by TSMC. Its first appearance was in the <a href="/facts/IPhone_6/vB2CIFx9">iPhone 6</a> and <a href="/facts/IPhone_6_Plus/vB2CIFx9">iPhone 6 Plus</a>, which were introduced on September 9, 2014.<a class="footnote-ref" id="fnref:75" href="#fn:75"><sup>75</sup></a> A year later it would drive the <a href="/facts/IPad_Mini_4/rSxgJdTz">iPad Mini 4</a>. Apple states that it has 25% more CPU performance and 50% more graphics performance while drawing only 50% of the power compared to its predecessor, the <a href="/facts/Apple_A7/WIaQPsQe">Apple A7</a>.<a class="footnote-ref" id="fnref:76" href="#fn:76"><sup>76</sup></a> On February 9, 2018, Apple released the HomePod, which is powered by an Apple A8 with 1 GB of RAM.<a class="footnote-ref" id="fnref:77" href="#fn:77"><sup>77</sup></a> </p><p>The A8 features an Apple-designed 1.4<a class="footnote-ref" id="fnref:78" href="#fn:78"><sup>78</sup></a> GHz 64-bit<a class="footnote-ref" id="fnref:79" href="#fn:79"><sup>79</sup></a> <a href="/facts/ARMv8/SALsYA79">ARMv8</a>-A<a class="footnote-ref" id="fnref:80" href="#fn:80"><sup>80</sup></a> dual-core CPU, and an integrated custom <a href="/facts/PowerVR/lTtwow8j">PowerVR GX6450</a> GPU in a four cluster configuration.<a class="footnote-ref" id="fnref:81" href="#fn:81"><sup>81</sup></a> The GPU features custom shader cores and compiler.<a class="footnote-ref" id="fnref:82" href="#fn:82"><sup>82</sup></a> The A8 is manufactured on a 20 nm process<a class="footnote-ref" id="fnref:83" href="#fn:83"><sup>83</sup></a> by <a href="/facts/TSMC/B4BdojRk">TSMC</a>,<a class="footnote-ref" id="fnref:84" href="#fn:84"><sup>84</sup></a> which replaced <a href="/facts/Samsung/oNXUwDjn">Samsung</a> as the manufacturer of Apple's mobile device processors. It contains 2 billion transistors. Despite that being double the number of transistors compared to the A7, its physical size has been reduced by 13% to 89 mm2 (consistent with a shrink only, not known to be a new microarchitecture).<a class="footnote-ref" id="fnref:85" href="#fn:85"><sup>85</sup></a> </p> <h3>Apple A8X</h3> <p class="note">Main article: <a href="/facts/Apple_A8X/tuoRAW24">Apple A8X</a></p> <p>The Apple A8X is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> SoC introduced at the launch of the <a href="/facts/IPad_Air_2/1p2HjQTJ">iPad Air 2</a> on October 16, 2014.<a class="footnote-ref" id="fnref:86" href="#fn:86"><sup>86</sup></a> It is a high performance variant of the <a href="/facts/Apple_A8/8hdFEwue">Apple A8</a>. Apple states that it has 40% more CPU performance and 2.5 times the graphics performance of its predecessor, the <a href="/facts/Apple_A7/WIaQPsQe">Apple A7</a>.<a class="footnote-ref" id="fnref:87" href="#fn:87"><sup>87</sup></a><a class="footnote-ref" id="fnref:88" href="#fn:88"><sup>88</sup></a> </p><p>Unlike the A8, this SoC uses a <a href="/facts/Triple-core/ABNb65hQ">triple-core</a> <a href="/facts/Central_processing_unit/Jxp1bqMV">CPU</a>, a new <a href="/facts/Octa-core/ABNb65hQ">octa-core</a> <a href="/facts/Graphics_processing_unit/PTK1RQVp">GPU</a>, <a href="/facts/Dual_channel_memory_architecture/2XQeG01g">dual channel memory</a> and slightly higher 1.5 GHz CPU clock rate.<a class="footnote-ref" id="fnref:89" href="#fn:89"><sup>89</sup></a> It uses an integrated custom octa-core <a href="/facts/PowerVR/lTtwow8j">PowerVR</a> GXA6850 <a href="/facts/Graphics_processing_unit/PTK1RQVp">graphics processing unit</a> (GPU) running at 450 MHz and a dual-channel <a href="/facts/Memory_controller/tHq2zlws">memory subsystem</a>.<a class="footnote-ref" id="fnref:90" href="#fn:90"><sup>90</sup></a> It is manufactured by <a href="/facts/TSMC/B4BdojRk">TSMC</a> on their 20 nm fabrication process, and consists of 3 billion <a href="/facts/Transistor_count/1oDVlhAY">transistors</a>. </p> <h3>Apple A9</h3> <p class="note">Main article: <a href="/facts/Apple_A9/0fvStBD5">Apple A9</a></p> <p>The Apple A9 is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARMv8-A/SALsYA79">ARM-based</a> SoC that first appeared in the <a href="/facts/IPhone_6S/fbldRdtr">iPhone 6S</a> and 6S Plus, which were introduced on September 9, 2015.<a class="footnote-ref" id="fnref:91" href="#fn:91"><sup>91</sup></a> Apple states that it has 70% more CPU performance and 90% more graphics performance compared to its predecessor, the <a href="/facts/Apple_A8/8hdFEwue">Apple A8</a>.<a class="footnote-ref" id="fnref:92" href="#fn:92"><sup>92</sup></a> It is dual sourced, a first for an Apple SoC; it is manufactured by Samsung on their 14 nm FinFET LPE process and by TSMC on their 16 nm FinFET process. It was subsequently included in the <a href="/facts/IPhone_SE_(1st_generation)/wIN7r90A">first-generation iPhone SE</a>, and the <a href="/facts/IPad_(5th_generation)/CGqtvP6R">iPad (5th generation)</a>. The Apple A9 was the last CPU that Apple manufactured through a contract with Samsung, as all A-series chips after are manufactured by TSMC. </p> <h3>Apple A9X</h3> <p class="note">Main article: <a href="/facts/Apple_A9X/JqoASWu4">Apple A9X</a></p> <p>The Apple A9X is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> SoC that was announced on September 9, 2015, and released on November 11, 2015, and first appeared in the <a href="/facts/IPad_Pro/thoY4y43">iPad Pro</a>.<a class="footnote-ref" id="fnref:93" href="#fn:93"><sup>93</sup></a> It offers 80% more CPU performance and two times the GPU performance of its predecessor, the <a href="/facts/Apple_A8X/tuoRAW24">Apple A8X</a>. It is manufactured by <a href="/facts/TSMC/B4BdojRk">TSMC</a> using a 16 <a href="/facts/Nanometer/a98sjHyu">nm</a> <a href="/facts/FinFET/xox63kP7">FinFET</a> process.<a class="footnote-ref" id="fnref:94" href="#fn:94"><sup>94</sup></a> </p> <h3>Apple A10 Fusion</h3> <p class="note">Main article: <a href="/facts/Apple_A10/HVRIKloF">Apple A10</a></p> <p>The Apple A10 Fusion is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARMv8-A/SALsYA79">ARM-based</a> SoC that first appeared in the <a href="/facts/IPhone_7/0WfwJsEq">iPhone 7</a> and 7 Plus, which were introduced on September 7, 2016.<a class="footnote-ref" id="fnref:95" href="#fn:95"><sup>95</sup></a> The A10 is also featured in the <a href="/facts/IPad_(6th_generation)/jeStBBW5">sixth-generation iPad</a>, <a href="/facts/IPad_(7th_generation)/vgdKp3HQ">seventh-generation iPad</a> and <a href="/facts/IPod_Touch_(7th_generation)/vLu262q5">seventh-generation iPod Touch</a>.<a class="footnote-ref" id="fnref:96" href="#fn:96"><sup>96</sup></a> It has a new <a href="/facts/ARM_big.LITTLE/YIWq2bWY">ARM big.LITTLE</a> quad core design with two high performance cores, and two smaller highly efficient cores. It is 40% faster than the A9, with 50% faster graphics. It is manufactured by TSMC on their 16 nm FinFET process. </p> <h3>Apple A10X Fusion</h3> <p class="note">Main article: <a href="/facts/Apple_A10X/27LwyX41">Apple A10X</a></p> <p>The Apple A10X Fusion is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARMv8-A/SALsYA79">ARM-based</a> SoC that first appeared in the 10.5″ <a href="/facts/IPad_Pro/thoY4y43">iPad Pro</a> and the second generation of the 12.9″ iPad Pro, which were both announced on June 5, 2017.<a class="footnote-ref" id="fnref:97" href="#fn:97"><sup>97</sup></a> It is a variant of the <a href="/facts/Apple_A10/HVRIKloF">A10</a> and Apple claims that it has 30 percent faster CPU performance and 40 percent faster GPU performance than its predecessor, the <a href="/facts/Apple_A9X/JqoASWu4">A9X</a>.<a class="footnote-ref" id="fnref:98" href="#fn:98"><sup>98</sup></a> On September 12, 2017, Apple announced that the <a href="/facts/Apple_TV_4K/FHVJqBCw">Apple TV 4K</a> would be powered by an A10X chip. It is made by TSMC on their 10 nm FinFET process.<a class="footnote-ref" id="fnref:99" href="#fn:99"><sup>99</sup></a> </p> <h3>Apple A11 Bionic</h3> <p class="note">Main article: <a href="/facts/Apple_A11/WqYEN1a8">Apple A11</a></p> <p>The Apple A11 Bionic is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARMv8-A/SALsYA79">ARM-based</a> SoC<a class="footnote-ref" id="fnref:100" href="#fn:100"><sup>100</sup></a> that first appeared in the <a href="/facts/IPhone_8/c6LTFN1c">iPhone 8</a>, iPhone 8 Plus, and <a href="/facts/IPhone_X/XtBft5I5">iPhone X</a>, which were introduced on September 12, 2017.<a class="footnote-ref" id="fnref:101" href="#fn:101"><sup>101</sup></a> It has two high-performance cores, which are 25% faster than the <a href="/facts/Apple_A10/HVRIKloF">A10 Fusion</a>, four high-efficiency cores, which are 70% faster than the energy-efficient cores in the A10, and for the first time an Apple-designed three-core GPU with 30% faster graphics performance than the A10.<a class="footnote-ref" id="fnref:102" href="#fn:102"><sup>102</sup></a><a class="footnote-ref" id="fnref:103" href="#fn:103"><sup>103</sup></a> It is also the first A-series chip to feature Apple's "Neural Engine," which enhances artificial intelligence and machine learning processes.<a class="footnote-ref" id="fnref:104" href="#fn:104"><sup>104</sup></a> </p> <h3>Apple A12 Bionic</h3> <p class="note">Main article: <a href="/facts/Apple_A12/gNpjauR6">Apple A12</a></p> <p>The Apple A12 Bionic is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> SoC that first appeared in the <a href="/facts/IPhone_XS/EL7NhzkV">iPhone XS</a>, <a href="/facts/IPhone_XS/EL7NhzkV">XS Max</a> and <a href="/facts/IPhone_XR/suVCNhsH">XR</a>, which were introduced on September 12, 2018. It is also used in the <a href="/facts/IPad_Air_(3rd_generation)/de65IQ83">third-generation iPad Air</a>, <a href="/facts/IPad_Mini_(5th_generation)/QHGIBMbR">fifth-generation iPad Mini</a>, and the <a href="/facts/IPad_(8th_generation)/DBDmygp0">eighth-generation iPad</a>. It has two high-performance cores, which are 15% faster than the A11 Bionic, and four high-efficiency cores, which have 50% lower power usage than the energy-efficient cores in the A11 Bionic.<a class="footnote-ref" id="fnref:105" href="#fn:105"><sup>105</sup></a> The A12 is manufactured by <a href="/facts/TSMC/B4BdojRk">TSMC</a><a class="footnote-ref" id="fnref:106" href="#fn:106"><sup>106</sup></a> using a <a href="/facts/7_nanometer/7UatqvR9">7 nm</a><a class="footnote-ref" id="fnref:107" href="#fn:107"><sup>107</sup></a> <a href="/facts/FinFET/xox63kP7">FinFET</a> process, the first to ship in a smartphone.<a class="footnote-ref" id="fnref:108" href="#fn:108"><sup>108</sup></a><a class="footnote-ref" id="fnref:109" href="#fn:109"><sup>109</sup></a> It is also used in the 6th generation <a href="/facts/Apple_TV/FHVJqBCw">Apple TV</a>. </p> <h3>Apple A12X Bionic</h3> <p class="note">Main article: <a href="/facts/Apple_A12X/yDED2zVc">Apple A12X</a></p> <p>The Apple A12X Bionic is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> SoC that first appeared in the 11.0″ <a href="/facts/IPad_Pro/thoY4y43">iPad Pro</a> and the third generation of the 12.9″ iPad Pro, which were both announced on October 30, 2018.<a class="footnote-ref" id="fnref:110" href="#fn:110"><sup>110</sup></a> It offers 35% faster single-core and 90% faster multi-core CPU performance than its predecessor, the A10X. It has four high-performance cores and four high-efficiency cores. The A12X is manufactured by <a href="/facts/TSMC/B4BdojRk">TSMC</a> using a <a href="/facts/7_nanometer/7UatqvR9">7 nm</a> <a href="/facts/FinFET/xox63kP7">FinFET</a> process. </p> <h4>Apple A12Z Bionic</h4> <p>The Apple A12Z Bionic is an updated version of the A12X Bionic, first appearing in the fourth generation <a href="/facts/IPad_Pro/thoY4y43">iPad Pro</a>, which was announced on March 18, 2020.<a class="footnote-ref" id="fnref:111" href="#fn:111"><sup>111</sup></a> It adds an additional GPU core, compared to the A12X, for improved graphics performance.<a class="footnote-ref" id="fnref:112" href="#fn:112"><sup>112</sup></a> The A12Z is also used in the <a href="/facts/Developer_Transition_Kit_(2020)/tsHLMGnc">Developer Transition Kit</a> prototype computer that helps developers prepare their software for Macs based on Apple silicon.<a class="footnote-ref" id="fnref:113" href="#fn:113"><sup>113</sup></a> </p> <h3>Apple A13 Bionic</h3> <p class="note">Main article: <a href="/facts/Apple_A13/2h3wVEU1">Apple A13</a></p> <p>The Apple A13 Bionic is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> SoC that first appeared in the <a href="/facts/IPhone_11/flAF4pfX">iPhone 11</a>, <a href="/facts/IPhone_11_Pro/y175pjnM">11 Pro</a>, and <a href="/facts/IPhone_11_Pro_Max/y175pjnM">11 Pro Max</a>, which were introduced on September 10, 2019. It is also featured in the <a href="/facts/IPhone_SE_(2nd_generation)/e64YK2wI">second-generation iPhone SE</a> (released April 15, 2020), the <a href="/facts/IPad_(9th_generation)/19pRAHNB">9th generation iPad</a> (announced September 14, 2021) and in the <a href="/facts/Apple_Studio_Display/REVPqxLs">Studio Display</a> (announced March 8, 2022) </p><p>The entire A13 SoC features a total of 18 cores – a six-core CPU, four-core GPU, and an eight-core Neural Engine processor, which is dedicated to handling on-board machine learning processes; four of the six cores on the CPU are low-powered cores that are dedicated to handling less CPU-intensive operations, such as voice calls, browsing the Web, and sending messages, while two higher-performance cores are used only for more CPU-intensive processes, such as recording 4K video or playing a video game.<a class="footnote-ref" id="fnref:114" href="#fn:114"><sup>114</sup></a> </p> <h3>Apple A14 Bionic</h3> <p class="note">Main article: <a href="/facts/Apple_A14/gcJPfsnJ">Apple A14</a></p> <p>The Apple A14 Bionic is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> SoC that first appeared in the <a href="/facts/IPad_Air_(4th_generation)/WztUTlVp">fourth-generation iPad Air</a> and <a href="/facts/IPhone_12/XywIVv8C">iPhone 12</a>, released on October 23, 2020. It is the first commercially available <a href="/facts/5_nm_process/5NndITJ3">5 nm</a> chipset and it contains 11.8 billion transistors and a 16-core AI processor.<a class="footnote-ref" id="fnref:115" href="#fn:115"><sup>115</sup></a> It includes Samsung <a href="/facts/LPDDR4X/2XdLrg47">LPDDR4X</a> <a href="/facts/Dynamic_random-access_memory/koI9FGo5">DRAM</a>, a 6-core CPU, and 4-Core GPU with real time machine learning capabilities. It was later used in the <a href="/facts/IPad_(10th_generation)/KITC2ejd">tenth-generation iPad</a>, released on October 26, 2022. </p> <h3>Apple A15 Bionic</h3> <p class="note">Main article: <a href="/facts/Apple_A15/gegtVIDT">Apple A15</a></p> <p>The Apple A15 Bionic is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> SoC that first appeared in the <a href="/facts/IPhone_13/CAt6fVgc">iPhone 13</a>, unveiled on September 14, 2021. The A15 is built on a 5-nanometer manufacturing process with 15 billion transistors. It has 2 high-performance processing cores, 4 high-efficiency cores, a new 5-core graphics for iPhone 13 Pro series (4-core for iPhone 13 and 13 mini) processing unit, and a new 16-core Neural Engine capable of 15.8 trillion operations per second.<a class="footnote-ref" id="fnref:116" href="#fn:116"><sup>116</sup></a><a class="footnote-ref" id="fnref:117" href="#fn:117"><sup>117</sup></a> It is also used in the <a href="/facts/IPhone_SE_(3rd_generation)/6tnKJVr1">third-generation iPhone SE</a>, <a href="/facts/IPhone_14/HHCmlwEJ">iPhone 14</a>, iPhone 14 Plus and the <a href="/facts/IPad_Mini_(6th_generation)/ko4zal1T">sixth-generation iPad Mini</a>.<a class="footnote-ref" id="fnref:118" href="#fn:118"><sup>118</sup></a> </p> <h3>Apple A16 Bionic</h3> <p class="note">Main article: <a href="/facts/Apple_A16/MCduVutl">Apple A16</a></p> <p>The Apple A16 Bionic is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> SoC that first appeared in the <a href="/facts/IPhone_14_Pro/eb84cgY1">iPhone 14 Pro</a>, unveiled on September 7, 2022. The A16 has 16 billion transistors and is built on <a href="/facts/TSMC/B4BdojRk">TSMC</a>'s <a href="/facts/5_nm_process/5NndITJ3">N4P fabrication process</a>, being touted by Apple as the first 4 nm processor in a smartphone.<a class="footnote-ref" id="fnref:119" href="#fn:119"><sup>119</sup></a><a class="footnote-ref" id="fnref:120" href="#fn:120"><sup>120</sup></a> However, N4 is an enhanced version of N5 technology, a <a href="/facts/De_facto/3Du6WQKh">de facto</a> fourth-generation <a href="/facts/5_nm_process/5NndITJ3">5 nm</a> <a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">manufacturing process</a>.<a class="footnote-ref" id="fnref:121" href="#fn:121"><sup>121</sup></a><a class="footnote-ref" id="fnref:122" href="#fn:122"><sup>122</sup></a><a class="footnote-ref" id="fnref:123" href="#fn:123"><sup>123</sup></a> The chip has 2 high-performance processing cores, 4 high-efficiency cores and 5-core graphics for iPhone 14 Pro series. Memory is upgraded to LPDDR5 for 50% higher bandwidth and a 7% faster 16-core Neural Engine capable of 17 trillion operations per second. The chip was later used in the <a href="/facts/IPhone_15/1Lo1A2ct">iPhone 15</a> and iPhone 15 Plus.<a class="footnote-ref" id="fnref:124" href="#fn:124"><sup>124</sup></a> </p> <h3>Apple A17 Pro</h3> <p class="note">Main article: <a href="/facts/Apple_A17/tf5mmo8D">Apple A17</a></p> <p>The Apple A17 Pro is a <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> SoC that first appeared in the <a href="/facts/IPhone_15_Pro/q3JtyMPX">iPhone 15 Pro</a>, unveiled on September 12, 2023. It is Apple's first <a href="/facts/3_nm_process/zR3mn68L">3 nm</a> SoC. The chip has 2 high-performance processing cores, 4 high-efficiency cores, a 6-core GPU for iPhone 15 Pro series, and a 16-core Neural Engine capable of 35 trillion operations per second. The GPU was described as their biggest redesign in the history of Apple GPUs, adding hardware accelerated <a href="/facts/Ray_tracing_(graphics)/n6qpap2q">ray tracing</a> and mesh shading support.<a class="footnote-ref" id="fnref:125" href="#fn:125"><sup>125</sup></a> </p> <h3>Apple A18 and Apple A18 Pro</h3> <p class="note">Main article: <a href="/facts/Apple_A18/zSk5E19c">Apple A18</a></p> <p>The Apple A18 and Apple A18 Pro are <a href="/facts/64-bit_computing/AgvkQHkM">64-bit</a> <a href="/facts/ARM_architecture_family/SALsYA79">ARM-based</a> SoCs designed by Apple that first appeared in the <a href="/facts/IPhone_16/4lpYouD7">iPhone 16</a> and <a href="/facts/IPhone_16_Pro/c1t7o7bA">iPhone 16 Pro</a> respectively, unveiled on September 9, 2024. Both SoCs are built on TSMC's N3E process and have 2 high-performance cores and 4 high-efficiency cores. The A18 has 5-core graphics (4-core for iPhone 16e), while the A18 Pro has 6-core graphics. The A18 and A18 Pro use LPDDR5X for 17% higher memory bandwidth, and the 16-core Neural Engine has the same quoted power as the A17 Pro. </p> <h3>Comparison of <i>A</i>-series processors</h3> <table><tbody><tr><th colspan="4">General</th><th colspan="4"><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th colspan="2">Computer architecture</th><th colspan="11">CPU</th><th colspan="6">GPU</th><th colspan="2"><a href="/facts/AI_accelerator/k0QuXHIb">AI accelerator</a></th><th colspan="5"><a href="/facts/Mobile_DDR/2XdLrg47">Memory technology</a></th><th rowspan="3">First release</th></tr><tr><th rowspan="2">Name</th><th rowspan="2">Codename</th><th rowspan="2">Part number</th><th rowspan="2">Image</th><th rowspan="2">Node</th><th rowspan="2">Manufacturer</th><th rowspan="2">Transistors count</th><th rowspan="2">Die size</th><th rowspan="2">CPU <a href="/facts/Instruction_set/8p8vwUeE">ISA</a></th><th rowspan="2">Bit width</th><th colspan="3">Performance core</th><th colspan="3">Efficiency core</th><th rowspan="2">Overall cores</th><th colspan="4">Cache</th><th rowspan="2">Vendor</th><th rowspan="2">Cores</th><th rowspan="2">SIMD EU count</th><th rowspan="2">FP32 ALU count</th><th rowspan="2">Frequency</th><th rowspan="2">FP32 FLOPS</th><th rowspan="2">Cores</th><th rowspan="2">OPS</th><th rowspan="2">Memory bus width</th><th rowspan="2">Total channelBit per channel</th><th rowspan="2">Memory type</th><th rowspan="2">Theoreticalbandwidth</th><th rowspan="2">Available capacity</th></tr><tr><th>Core name</th><th>Cores</th><th>Core speed</th><th>Core name</th><th>Cores</th><th>Core speed</th><th>L1</th><th>L2</th><th>L3</th><th>SLC</th></tr><tr><th></th><td>APL0098</td><td>S5L8900</td><td></td><td><a href="/facts/90_nanometer/mmjMro9E">90 nm</a><a class="footnote-ref" id="fnref:126" href="#fn:126"><sup>126</sup></a></td><td rowspan="18"><a href="/facts/Samsung/oNXUwDjn">Samsung</a></td><td></td><td>72 mm2<a class="footnote-ref" id="fnref:127" href="#fn:127"><sup>127</sup></a></td><td rowspan="2"><a href="/facts/ARM_architecture/SALsYA79">ARMv6</a></td><td rowspan="16">32-bit</td><td rowspan="2"><a href="/facts/ARM11/RBYoh2hU">ARM11</a></td><td rowspan="7">1</td><td>412 MHz</td><td rowspan="26">—</td><td rowspan="26">—</td><td rowspan="26">—</td><td rowspan="7"><a href="/facts/Single-core/ErrHPffJ">Single-core</a></td><td rowspan="2">L1i: 16 KBL1d: 16 KB</td><td rowspan="2">—</td><td rowspan="16">—</td><td rowspan="29">—</td><td rowspan="2"><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">MBX Lite</a></td><td rowspan="7">1</td><td rowspan="2">1</td><td rowspan="2">8</td><td>60 MHz – 103 MHz</td><td>0.96 GFLOPS – 1.64 GFLOPS</td><td rowspan="31">—</td><td rowspan="31">—</td><td>16-bit</td><td>1 channel16-bit/channel</td><td rowspan="2"><a href="/facts/LPDDR/2XdLrg47">LPDDR</a>-266(133.25 MHz)</td><td>533 MB/s</td><td rowspan="2">128 MB</td><td>June 29, 2007</td></tr><tr><th></th><td>APL0278</td><td>S5L8720</td><td></td><td rowspan="2"><a href="/facts/65_nanometer/yqoIVRgR">65 nm</a><a class="footnote-ref" id="fnref:128" href="#fn:128"><sup>128</sup></a></td><td></td><td>36 mm2<a class="footnote-ref" id="fnref:129" href="#fn:129"><sup>129</sup></a></td><td>533 MHz</td><td>103 MHz – 133 MHz</td><td>1.64 GFLOPs – 2.12 GFLOPS</td><td rowspan="3">32-bit</td><td rowspan="3">1 channel32-bit/channel</td><td>1066 MB/s</td><td>July 11, 2008</td></tr><tr><th rowspan="2"></th><td>APL0298</td><td>S5L8920</td><td></td><td></td><td>71.8 mm2<a class="footnote-ref" id="fnref:130" href="#fn:130"><sup>130</sup></a></td><td rowspan="12"><a href="/facts/ARMv7/SALsYA79">ARMv7</a></td><td rowspan="5"><a href="/facts/ARM_Cortex-A8/vM6beXwg">Cortex-A8</a></td><td rowspan="2">600 MHz</td><td rowspan="14">L1i: 32 KBL1d: 32 KB</td><td rowspan="2">256 KB</td><td rowspan="5"><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">SGX535</a><a class="footnote-ref" id="fnref:131" href="#fn:131"><sup>131</sup></a></td><td rowspan="5">2</td><td rowspan="5">16</td><td rowspan="2">200 MHz</td><td rowspan="2">6.4 GFLOPS</td><td rowspan="5">LPDDR-400(200 MHz)</td><td rowspan="2">1.6 GB/s</td><td rowspan="4">256 MB</td><td>June 19, 2009</td></tr><tr><td>APL2298</td><td>S5L8922</td><td></td><td rowspan="6"><a href="/facts/45_nanometer/hlbmxAme">45 nm</a><a class="footnote-ref" id="fnref:132" href="#fn:132"><sup>132</sup></a><a class="footnote-ref" id="fnref:133" href="#fn:133"><sup>133</sup></a><a class="footnote-ref" id="fnref:134" href="#fn:134"><sup>134</sup></a></td><td></td><td>41.6 mm2<a class="footnote-ref" id="fnref:135" href="#fn:135"><sup>135</sup></a></td><td>September 9, 2009</td></tr><tr><th rowspan="3"><a href="/facts/Apple_A4/BBj4htyY">A4</a></th><td rowspan="3">APL0398</td><td rowspan="3">S5L8930</td><td rowspan="3"></td><td rowspan="3"></td><td rowspan="3">53.3 mm2<a class="footnote-ref" id="fnref:136" href="#fn:136"><sup>136</sup></a><a class="footnote-ref" id="fnref:137" href="#fn:137"><sup>137</sup></a></td><td>800 MHz</td><td rowspan="3">512 KB</td><td rowspan="3">200 MHz – 250 MHz</td><td rowspan="3">6.4 GFLOPS – 8.0 GFLOPS</td><td rowspan="9">64-bit</td><td rowspan="9">2 channels32-bit/channel</td><td rowspan="3">3.2 GB/s</td><td rowspan="3">April 3, 2010</td></tr><tr><td>1.0 GHz</td></tr><tr><td>800 MHz</td><td rowspan="7">512 MB</td></tr><tr><th rowspan="6"><a href="/facts/Apple_A5/qr0k2aFB">A5</a></th><td rowspan="2">APL0498</td><td rowspan="2">S5L8940</td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2">122.2 mm2<a class="footnote-ref" id="fnref:138" href="#fn:138"><sup>138</sup></a></td><td rowspan="7"><a href="/facts/ARM_Cortex-A9_MPCore/7frBGbbK">Cortex-A9</a></td><td rowspan="4">2</td><td>800 MHz</td><td rowspan="4"><a href="/facts/Multi-core_processor/ABNb65hQ">Dual-core</a></td><td rowspan="14">1 MB</td><td rowspan="8"><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">SGX543</a><a class="footnote-ref" id="fnref:139" href="#fn:139"><sup>139</sup></a><a class="footnote-ref" id="fnref:140" href="#fn:140"><sup>140</sup></a></td><td rowspan="6">2</td><td rowspan="6">4</td><td rowspan="6">32</td><td rowspan="7">200 MHz</td><td rowspan="6">12.8 GFLOPS</td><td rowspan="7"><a href="/facts/LPDDR2/2XdLrg47">LPDDR2</a>-800(400 MHz)</td><td rowspan="6">6.4 GB/s</td><td rowspan="2">March 11, 2011</td></tr><tr><td>1.0 GHz</td></tr><tr><td rowspan="3">APL2498</td><td rowspan="3">S5L8942</td><td rowspan="3"></td><td rowspan="4"><a href="/facts/32_nanometer/CsdohJVh">32 nm</a><a href="/facts/High-%25CE%25BA_dielectric/4E8qtXmp">Hκ</a> <a href="/facts/Metal_gate/vFzyEhb4">MG</a><a class="footnote-ref" id="fnref:141" href="#fn:141"><sup>141</sup></a><a class="footnote-ref" id="fnref:142" href="#fn:142"><sup>142</sup></a></td><td rowspan="3"></td><td rowspan="3">69.6 mm2<a class="footnote-ref" id="fnref:143" href="#fn:143"><sup>143</sup></a></td><td>800 MHz</td><td rowspan="3">March 7, 2012</td></tr><tr><td rowspan="4">1.0 GHz</td></tr><tr><td>2<a class="footnote-ref" id="fnref:144" href="#fn:144"><sup>144</sup></a></td><td><a href="/facts/Multi-core_processor/ABNb65hQ">Dual-core</a><a class="footnote-ref" id="fnref:145" href="#fn:145"><sup>145</sup></a></td></tr><tr><td>APL7498</td><td>S5L8947</td><td></td><td></td><td>37.8 mm2<a class="footnote-ref" id="fnref:146" href="#fn:146"><sup>146</sup></a></td><td>1</td><td><a href="/facts/Single-core/ErrHPffJ">Single-core</a></td><td>January 28, 2013</td></tr><tr><th><a href="/facts/Apple_A5X/8tmojSXE">A5X</a></th><td>APL5498</td><td>S5L8945</td><td></td><td><a href="/facts/45_nanometer/hlbmxAme">45 nm</a><a class="footnote-ref" id="fnref:147" href="#fn:147"><sup>147</sup></a><a class="footnote-ref" id="fnref:148" href="#fn:148"><sup>148</sup></a><a class="footnote-ref" id="fnref:149" href="#fn:149"><sup>149</sup></a></td><td></td><td>165 mm2<a class="footnote-ref" id="fnref:150" href="#fn:150"><sup>150</sup></a></td><td rowspan="8">2</td><td rowspan="8"><a href="/facts/Multi-core_processor/ABNb65hQ">Dual-core</a></td><td>4</td><td>8</td><td>64</td><td>25.6 GFLOPS</td><td>128-bit</td><td>4 channels32-bit/channel</td><td>12.8 GB/s</td><td rowspan="7">1 GB</td><td>March 16, 2012</td></tr><tr><th><a href="/facts/Apple_A6/vbIa3hBp">A6</a></th><td>APL0598</td><td>S5L8950</td><td></td><td rowspan="2"><a href="/facts/32_nanometer/CsdohJVh">32 nm</a><a href="/facts/High-%25CE%25BA_dielectric/4E8qtXmp">Hκ</a> <a href="/facts/Metal_gate/vFzyEhb4">MG</a><a class="footnote-ref" id="fnref:151" href="#fn:151"><sup>151</sup></a><a class="footnote-ref" id="fnref:152" href="#fn:152"><sup>152</sup></a><a class="footnote-ref" id="fnref:153" href="#fn:153"><sup>153</sup></a></td><td></td><td>96.71 mm2<a class="footnote-ref" id="fnref:154" href="#fn:154"><sup>154</sup></a><a class="footnote-ref" id="fnref:155" href="#fn:155"><sup>155</sup></a></td><td rowspan="2"><a href="/facts/ARMv7/SALsYA79">ARMv7s</a><a class="footnote-ref" id="fnref:156" href="#fn:156"><sup>156</sup></a></td><td rowspan="2">Swift<a class="footnote-ref" id="fnref:157" href="#fn:157"><sup>157</sup></a></td><td>1.3 GHz<a class="footnote-ref" id="fnref:158" href="#fn:158"><sup>158</sup></a></td><td>3</td><td>6</td><td>48</td><td>266 or 709 MHz</td><td>25.5 or 68.0 GFLOPS</td><td>64-bit</td><td>2 channels32-bit/channel</td><td rowspan="2">LPDDR2-1066(533 MHz)</td><td>8.5 GB/s</td><td>September 21, 2012</td></tr><tr><th><a href="/facts/Apple_A6X/1HT0QhNk">A6X</a></th><td>APL5598</td><td>S5L8955</td><td></td><td></td><td>123 mm2<a class="footnote-ref" id="fnref:159" href="#fn:159"><sup>159</sup></a></td><td>1.4 GHz<a class="footnote-ref" id="fnref:160" href="#fn:160"><sup>160</sup></a></td><td><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">SGX554</a><a class="footnote-ref" id="fnref:161" href="#fn:161"><sup>161</sup></a><a class="footnote-ref" id="fnref:162" href="#fn:162"><sup>162</sup></a></td><td rowspan="6">4</td><td rowspan="6">16</td><td rowspan="6">128</td><td>300 MHz</td><td>76.8 GFLOPS</td><td>128-bit</td><td>4 channels32-bit/channel</td><td>17.0 GB/s</td><td>November 2, 2012</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A7/WIaQPsQe">A7</a></th><td>APL0698</td><td>S5L8960</td><td></td><td rowspan="2">28 nm<a href="/facts/High-%25CE%25BA_dielectric/4E8qtXmp">Hκ</a> <a href="/facts/Metal_gate/vFzyEhb4">MG</a><a class="footnote-ref" id="fnref:163" href="#fn:163"><sup>163</sup></a><a class="footnote-ref" id="fnref:164" href="#fn:164"><sup>164</sup></a></td><td rowspan="2">1 billion</td><td rowspan="2">102 mm2<a class="footnote-ref" id="fnref:165" href="#fn:165"><sup>165</sup></a><a class="footnote-ref" id="fnref:166" href="#fn:166"><sup>166</sup></a></td><td rowspan="10"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.0-A<a class="footnote-ref" id="fnref:167" href="#fn:167"><sup>167</sup></a><a class="footnote-ref" id="fnref:168" href="#fn:168"><sup>168</sup></a></td><td rowspan="34">64-bit</td><td rowspan="2">Cyclone</td><td>1.3 GHz</td><td rowspan="10">L1i: 64 KBL1d: 64 KB</td><td rowspan="6">4 MB (Inclusive)<a class="footnote-ref" id="fnref:169" href="#fn:169"><sup>169</sup></a><a class="footnote-ref" id="fnref:170" href="#fn:170"><sup>170</sup></a><a class="footnote-ref" id="fnref:171" href="#fn:171"><sup>171</sup></a></td><td rowspan="2"><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">G6430</a><a class="footnote-ref" id="fnref:172" href="#fn:172"><sup>172</sup></a><a class="footnote-ref" id="fnref:173" href="#fn:173"><sup>173</sup></a></td><td rowspan="2">450 MHz</td><td rowspan="2">115.2 GFLOPS</td><td rowspan="5">64-bit</td><td rowspan="5">1 channel64-bit/channel</td><td rowspan="6"><a href="/facts/LPDDR3/2XdLrg47">LPDDR3</a>-1600(800 MHz)</td><td rowspan="5">12.8 GB/s</td><td>September 20, 2013</td></tr><tr><td>APL5698</td><td>S5L8965</td><td></td><td>1.4 GHz</td><td>November 1, 2013</td></tr><tr><th rowspan="3"><a href="/facts/Apple_A8/8hdFEwue">A8</a></th><td rowspan="3">APL1011</td><td rowspan="3">T7000</td><td rowspan="3"></td><td rowspan="4">20 nm<a href="/facts/High-%25CE%25BA_dielectric/4E8qtXmp">Hκ</a> <a href="/facts/Metal_gate/vFzyEhb4">MG</a><a class="footnote-ref" id="fnref:174" href="#fn:174"><sup>174</sup></a><a class="footnote-ref" id="fnref:175" href="#fn:175"><sup>175</sup></a></td><td rowspan="4">TSMC</td><td rowspan="3">2 billion</td><td rowspan="3">89 mm2<a class="footnote-ref" id="fnref:176" href="#fn:176"><sup>176</sup></a><a class="footnote-ref" id="fnref:177" href="#fn:177"><sup>177</sup></a><a class="footnote-ref" id="fnref:178" href="#fn:178"><sup>178</sup></a></td><td rowspan="4">Typhoon</td><td>1.1 GHz</td><td rowspan="3"><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">GX6450</a><a class="footnote-ref" id="fnref:179" href="#fn:179"><sup>179</sup></a><a class="footnote-ref" id="fnref:180" href="#fn:180"><sup>180</sup></a><a class="footnote-ref" id="fnref:181" href="#fn:181"><sup>181</sup></a></td><td rowspan="3">533 MHz</td><td rowspan="3">136.4 GFLOPS</td><td rowspan="3">September 19, 2014</td></tr><tr><td>1.4 GHz</td></tr><tr><td rowspan="2">1.5 GHz</td><td rowspan="5">2 GB</td></tr><tr><th><a href="/facts/Apple_A8X/tuoRAW24">A8X</a></th><td>APL1021</td><td>T7001</td><td></td><td>3 billion</td><td>128 mm2<a class="footnote-ref" id="fnref:182" href="#fn:182"><sup>182</sup></a></td><td>3</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">3-core</a></td><td>2 MB</td><td><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">GX6850</a><a class="footnote-ref" id="fnref:183" href="#fn:183"><sup>183</sup></a><a class="footnote-ref" id="fnref:184" href="#fn:184"><sup>184</sup></a><a class="footnote-ref" id="fnref:185" href="#fn:185"><sup>185</sup></a></td><td>8</td><td>32</td><td>256</td><td>450 MHz</td><td>230.4 GFLOPS</td><td>128-bit</td><td>2 channels64-bit/channel</td><td rowspan="4">25.6 GB/s</td><td>October 22, 2014</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A9/0fvStBD5">A9</a></th><td>APL0898</td><td>S8000</td><td></td><td><a href="/facts/14_nanometer/lQYsD92n">14 nm</a><a href="/facts/FinFET/xox63kP7">FinFET</a><a class="footnote-ref" id="fnref:186" href="#fn:186"><sup>186</sup></a></td><td>Samsung</td><td rowspan="2">≥ 2 billion</td><td>96 mm2<a class="footnote-ref" id="fnref:187" href="#fn:187"><sup>187</sup></a></td><td rowspan="4">Twister</td><td rowspan="4">2</td><td rowspan="2">1.85 GHz<a class="footnote-ref" id="fnref:188" href="#fn:188"><sup>188</sup></a><a class="footnote-ref" id="fnref:189" href="#fn:189"><sup>189</sup></a></td><td rowspan="4"><a href="/facts/Multi-core_processor/ABNb65hQ">Dual-core</a></td><td rowspan="4">3 MB</td><td rowspan="2">4 MB (<a href="/facts/CPU_cache/x8BYFcdv">Victim</a>)<p><a class="footnote-ref" id="fnref:190" href="#fn:190"><sup>190</sup></a><a class="footnote-ref" id="fnref:191" href="#fn:191"><sup>191</sup></a></p></td><td rowspan="2"><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">GT7600</a><a class="footnote-ref" id="fnref:192" href="#fn:192"><sup>192</sup></a><a class="footnote-ref" id="fnref:193" href="#fn:193"><sup>193</sup></a></td><td rowspan="2">6</td><td rowspan="2">24</td><td rowspan="2">192</td><td rowspan="4">650 MHz</td><td rowspan="2">249.6 GFLOPS</td><td rowspan="2">64-bit</td><td rowspan="2">1 channel64-bit/channel</td><td rowspan="9"><a href="/facts/LPDDR4/2XdLrg47">LPDDR4</a>-3200(1600 MHz)</td><td rowspan="2">September 25, 2015</td></tr><tr><td>APL1022</td><td>S8003</td><td></td><td rowspan="6">16 nm<a href="/facts/FinFET/xox63kP7">FinFET</a><a class="footnote-ref" id="fnref:194" href="#fn:194"><sup>194</sup></a><a class="footnote-ref" id="fnref:195" href="#fn:195"><sup>195</sup></a><a class="footnote-ref" id="fnref:196" href="#fn:196"><sup>196</sup></a></td><td rowspan="27">TSMC</td><td>104.5 mm2<a class="footnote-ref" id="fnref:197" href="#fn:197"><sup>197</sup></a></td></tr><tr><th rowspan="2"><a href="/facts/Apple_A9X/JqoASWu4">A9X</a></th><td rowspan="2">APL1021</td><td rowspan="2">S8001</td><td rowspan="2"></td><td rowspan="2">≥ 3 billion</td><td rowspan="2">143.9 mm2<a class="footnote-ref" id="fnref:198" href="#fn:198"><sup>198</sup></a><a class="footnote-ref" id="fnref:199" href="#fn:199"><sup>199</sup></a></td><td>2.16 GHz<a class="footnote-ref" id="fnref:200" href="#fn:200"><sup>200</sup></a><a class="footnote-ref" id="fnref:201" href="#fn:201"><sup>201</sup></a></td><td rowspan="2">—<a class="footnote-ref" id="fnref:202" href="#fn:202"><sup>202</sup></a><a class="footnote-ref" id="fnref:203" href="#fn:203"><sup>203</sup></a></td><td rowspan="2"><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">GT7850</a><a class="footnote-ref" id="fnref:204" href="#fn:204"><sup>204</sup></a><a class="footnote-ref" id="fnref:205" href="#fn:205"><sup>205</sup></a></td><td rowspan="2">12</td><td rowspan="2">48</td><td rowspan="2">384</td><td rowspan="2">499.2 GFLOPS</td><td>128-bit<a class="footnote-ref" id="fnref:206" href="#fn:206"><sup>206</sup></a></td><td>2 channels<a class="footnote-ref" id="fnref:207" href="#fn:207"><sup>207</sup></a>64-bit/channel</td><td rowspan="2">November 11, 2015</td></tr><tr><td>2.26 GHz</td><td>128-bit</td><td>2 channels64-bit/channel</td><td>51.2 GB/s</td><td>4 GB</td></tr><tr><th rowspan="3"><a href="/facts/Apple_A10/HVRIKloF">A10 Fusion</a></th><td rowspan="3">APL1W24</td><td rowspan="3">T8010</td><td rowspan="3"></td><td rowspan="3">3.3 billion</td><td rowspan="3">125 mm2<a class="footnote-ref" id="fnref:208" href="#fn:208"><sup>208</sup></a></td><td rowspan="5"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.1-A</td><td rowspan="5">Hurricane</td><td rowspan="3">2</td><td>1.64 GHz</td><td rowspan="5">Zephyr</td><td rowspan="3">2</td><td rowspan="3">1.09 GHz</td><td rowspan="3"><a href="/facts/Multi-core_processor/ABNb65hQ">Quad-core</a><a class="footnote-ref" id="fnref:209" href="#fn:209"><sup>209</sup></a></td><td rowspan="7">P-core:L1i: 64 KBL1d: 64 KBE-core:L1i: 32 KBL1d: 32 KB</td><td rowspan="3">P-core:3 MBE-core:1 MB</td><td rowspan="3">4 MB</td><td rowspan="5"><a href="/facts/PowerVR/lTtwow8j">PowerVR</a><a href="/facts/List_of_PowerVR_products/Fb1KU760">GT7600Plus</a><a class="footnote-ref" id="fnref:210" href="#fn:210"><sup>210</sup></a><a class="footnote-ref" id="fnref:211" href="#fn:211"><sup>211</sup></a><a class="footnote-ref" id="fnref:212" href="#fn:212"><sup>212</sup></a><a class="footnote-ref" id="fnref:213" href="#fn:213"><sup>213</sup></a></td><td rowspan="3">6</td><td rowspan="3">24</td><td rowspan="3">192</td><td rowspan="3">900 MHz</td><td rowspan="3">345.6 GFLOPS</td><td rowspan="3">64-bit</td><td rowspan="3">1 channel64-bit/channel</td><td rowspan="3">25.6 GB/s</td><td rowspan="2">2 GB</td><td rowspan="3">September 16, 2016</td></tr><tr><td rowspan="2">2.34 GHz</td></tr><tr><td>3 GB</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A10X/27LwyX41">A10X Fusion</a></th><td rowspan="2">APL1071</td><td rowspan="2">T8011</td><td rowspan="2"></td><td rowspan="4"><a href="/facts/10_nanometer/h5qaJnz9">10 nm</a><a href="/facts/FinFET/xox63kP7">FinFET</a><a class="footnote-ref" id="fnref:214" href="#fn:214"><sup>214</sup></a></td><td rowspan="2">≥ 4 billion</td><td rowspan="2">96.4 mm2<a class="footnote-ref" id="fnref:215" href="#fn:215"><sup>215</sup></a></td><td rowspan="2">3</td><td rowspan="2">2.38 GHz</td><td rowspan="2">3</td><td rowspan="2">1.30 GHz</td><td rowspan="2"><a href="/facts/Multi-core_processor/ABNb65hQ">6-core</a><a class="footnote-ref" id="fnref:216" href="#fn:216"><sup>216</sup></a></td><td rowspan="4">P-core:8 MBE-core:1 MB</td><td rowspan="19">—<a class="footnote-ref" id="fnref:217" href="#fn:217"><sup>217</sup></a><a class="footnote-ref" id="fnref:218" href="#fn:218"><sup>218</sup></a></td><td rowspan="4">4 MB</td><td rowspan="2">12</td><td rowspan="2">48</td><td rowspan="2">384</td><td rowspan="2">1000 MHz</td><td rowspan="2">768.0 GFLOPS</td><td rowspan="2">128-bit</td><td rowspan="2">2 channels64-bit/channel</td><td rowspan="2">51.2 GB/s</td><td>3 GB</td><td rowspan="2">June 13, 2017</td></tr><tr><td>4 GB</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A11/WqYEN1a8">A11Bionic</a></th><td rowspan="2">APL1W72</td><td rowspan="2">T8015</td><td rowspan="2"></td><td rowspan="2">4.3 billion</td><td rowspan="2">87.66 mm2<a class="footnote-ref" id="fnref:219" href="#fn:219"><sup>219</sup></a></td><td rowspan="2"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.2-A<a class="footnote-ref" id="fnref:220" href="#fn:220"><sup>220</sup></a></td><td rowspan="2">Monsoon</td><td rowspan="4">2</td><td rowspan="2">2.39 GHz</td><td rowspan="2">Mistral</td><td rowspan="2">4<a class="footnote-ref" id="fnref:221" href="#fn:221"><sup>221</sup></a></td><td rowspan="2">1.19 GHz</td><td rowspan="4"><a href="/facts/Multi-core_processor/ABNb65hQ">6-core</a></td><td rowspan="2">1stgeneration Apple-designed</td><td rowspan="2">3</td><td rowspan="2">12</td><td rowspan="2">192</td><td rowspan="2">1066 MHz</td><td rowspan="2">409.3 GFLOPS</td><td rowspan="2">2</td><td rowspan="2">600 billion OPS</td><td rowspan="4">64-bit</td><td rowspan="4">4 channels16-bit/channel</td><td rowspan="15"><a href="/facts/LPDDR4X/2XdLrg47">LPDDR4X</a>-4266(2133 MHz)</td><td rowspan="4">34.1 GB/s</td><td>2 GB</td><td rowspan="2">September 22, 2017</td></tr><tr><td rowspan="2">3 GB</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A12/gNpjauR6">A12Bionic</a></th><td rowspan="2">APL1W81</td><td rowspan="2">T8020</td><td rowspan="2"></td><td rowspan="6"><a href="/facts/7_nanometer/7UatqvR9">7 nm</a> (N7)<a href="/facts/FinFET/xox63kP7">FinFET</a></td><td rowspan="2">6.9 billion</td><td rowspan="2">83.27 mm2<a class="footnote-ref" id="fnref:222" href="#fn:222"><sup>222</sup></a></td><td rowspan="6"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.3-A<a class="footnote-ref" id="fnref:223" href="#fn:223"><sup>223</sup></a></td><td rowspan="6">Vortex</td><td rowspan="6">2.49 GHz</td><td rowspan="6">Tempest</td><td rowspan="17">4</td><td rowspan="6">1.59 GHz</td><td rowspan="6">P-core:L1i: 128 KBL1d: 128 KBE-core:L1i: 32 KBL1d: 32 KB</td><td rowspan="6">P-core:8 MBE-core:2 MB</td><td rowspan="6">8 MB</td><td rowspan="2">2ndgeneration Apple-designed (Apple G11P)</td><td rowspan="2">4</td><td rowspan="2">16</td><td rowspan="2">256</td><td rowspan="6">1125 MHz</td><td rowspan="2">576.0 GFLOPS</td><td rowspan="8">8</td><td rowspan="6">5 TOPS</td><td rowspan="2">September 21, 2018</td></tr><tr><td rowspan="2">4 GB</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A12X/yDED2zVc">A12X Bionic</a></th><td rowspan="4">APL1083</td><td rowspan="4">T8027</td><td rowspan="2"></td><td rowspan="4">10 billion</td><td rowspan="4">135 mm2<a class="footnote-ref" id="fnref:224" href="#fn:224"><sup>224</sup></a></td><td rowspan="4">4</td><td rowspan="4"><a href="/facts/Multi-core_processor/ABNb65hQ">8-core</a></td><td rowspan="4">Second generation Apple-designed (Apple G11G)</td><td rowspan="2">7</td><td rowspan="2">28</td><td rowspan="2">448</td><td rowspan="2">1.008 TFLOPS</td><td rowspan="4">128-bit</td><td rowspan="4">2 channels64-bit/channel</td><td rowspan="4">68.2 GB/s</td><td rowspan="2">November 7, 2018</td></tr><tr><td rowspan="2">6 GB</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A12X/yDED2zVc">A12Z Bionic</a></th><td rowspan="2"></td><td rowspan="2">8</td><td rowspan="2">32</td><td rowspan="2">512</td><td rowspan="2">1.152 TFLOPS</td><td>March 25, 2020</td></tr><tr><td>16 GB</td><td>June 22, 2020</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A13/2h3wVEU1">A13Bionic</a></th><td rowspan="2">APL1W85</td><td rowspan="2">T8030</td><td rowspan="2"></td><td rowspan="2"><a href="/facts/7_nanometer/7UatqvR9">7 nm</a> (N7P)<a href="/facts/FinFET/xox63kP7">FinFET</a></td><td rowspan="2">8.5 billion</td><td rowspan="2">98.48 mm2<a class="footnote-ref" id="fnref:225" href="#fn:225"><sup>225</sup></a></td><td rowspan="2"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.4-A<a class="footnote-ref" id="fnref:226" href="#fn:226"><sup>226</sup></a></td><td rowspan="2">Lightning</td><td rowspan="11">2</td><td rowspan="2">2.66 GHz</td><td rowspan="2">Thunder</td><td rowspan="2">1.72 GHz</td><td rowspan="11"><a href="/facts/Multi-core_processor/ABNb65hQ">6-core</a></td><td rowspan="2">P-core:L1i: 128 KBL1d: 128 KBE-core:L1i: 96 KBL1d: 48 KB</td><td rowspan="4">P-core:8 MBE-core:4 MB</td><td rowspan="4">16 MB</td><td rowspan="2">3rdgeneration Apple-designed<a class="footnote-ref" id="fnref:227" href="#fn:227"><sup>227</sup></a></td><td rowspan="5">4</td><td rowspan="5">16<a class="footnote-ref" id="fnref:228" href="#fn:228"><sup>228</sup></a></td><td rowspan="4">256</td><td rowspan="2">1350 MHz</td><td rowspan="2">691.2 GFLOPS</td><td rowspan="2">5.5 TOPS</td><td rowspan="11">64-bit</td><td rowspan="11">4 channels16-bit/channel</td><td rowspan="7">34.1 GB/s</td><td>3 GB</td><td rowspan="2">September 20, 2019</td></tr><tr><td rowspan="2">4 GB</td></tr><tr><th rowspan="2"><a href="/facts/Apple_A14/gcJPfsnJ">A14Bionic</a></th><td rowspan="2">APL1W01</td><td rowspan="2">T8101</td><td rowspan="2"></td><td rowspan="2"><a href="/facts/5_nm_process/5NndITJ3">5 nm</a> (N5)<a href="/facts/FinFET/xox63kP7">FinFET</a></td><td rowspan="2">11.8 billion</td><td rowspan="2">88 mm2<a class="footnote-ref" id="fnref:229" href="#fn:229"><sup>229</sup></a></td><td rowspan="2"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.5-A<a class="footnote-ref" id="fnref:230" href="#fn:230"><sup>230</sup></a></td><td rowspan="2">Firestorm</td><td rowspan="2">3.00 GHz</td><td rowspan="2">Icestorm</td><td rowspan="2">1.82 GHz</td><td rowspan="7">P-core:L1i: 192 KBL1d: 128 KBE-core:L1i: 128 KBL1d: 64 KB</td><td rowspan="2">4thgeneration Apple-designed<a class="footnote-ref" id="fnref:231" href="#fn:231"><sup>231</sup></a><a class="footnote-ref" id="fnref:232" href="#fn:232"><sup>232</sup></a><a class="footnote-ref" id="fnref:233" href="#fn:233"><sup>233</sup></a><a class="footnote-ref" id="fnref:234" href="#fn:234"><sup>234</sup></a></td><td rowspan="2">1462.5 MHz</td><td rowspan="2">748.8 GFLOPS</td><td rowspan="9">16</td><td rowspan="2">11 TOPS</td><td rowspan="2">October 23, 2020</td></tr><tr><td>4 GB</td></tr><tr><th rowspan="3"><a href="/facts/Apple_A15/gegtVIDT">A15Bionic</a></th><td rowspan="3">APL1W07<a class="footnote-ref" id="fnref:235" href="#fn:235"><sup>235</sup></a></td><td rowspan="3">T8110</td><td rowspan="3"></td><td rowspan="3"><a href="/facts/5_nm_process/5NndITJ3">5 nm</a> (N5P)<a href="/facts/FinFET/xox63kP7">FinFET</a></td><td rowspan="3">15 billion</td><td rowspan="3">108.01 mm2<a class="footnote-ref" id="fnref:236" href="#fn:236"><sup>236</sup></a></td><td rowspan="5"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.6-A<a class="footnote-ref" id="fnref:237" href="#fn:237"><sup>237</sup></a></td><td rowspan="3">Avalanche</td><td>3.24 GHz</td><td rowspan="3">Blizzard</td><td rowspan="4">2.02 GHz</td><td rowspan="3">P-core:12 MBE-core:4 MB</td><td rowspan="3">32 MB</td><td rowspan="3">5thgeneration Apple-designed<a class="footnote-ref" id="fnref:238" href="#fn:238"><sup>238</sup></a><a class="footnote-ref" id="fnref:239" href="#fn:239"><sup>239</sup></a><a class="footnote-ref" id="fnref:240" href="#fn:240"><sup>240</sup></a></td><td>512<a class="footnote-ref" id="fnref:241" href="#fn:241"><sup>241</sup></a></td><td rowspan="3">1338 MHz<a class="footnote-ref" id="fnref:242" href="#fn:242"><sup>242</sup></a><a class="footnote-ref" id="fnref:243" href="#fn:243"><sup>243</sup></a></td><td>1.370 TFLOPS<a class="footnote-ref" id="fnref:244" href="#fn:244"><sup>244</sup></a></td><td rowspan="3">15.8 TOPS</td><td rowspan="2">4 GB</td><td rowspan="3">September 24, 2021</td></tr><tr><td>2.93 GHz</td><td rowspan="3">5</td><td rowspan="3">20<a class="footnote-ref" id="fnref:245" href="#fn:245"><sup>245</sup></a><a class="footnote-ref" id="fnref:246" href="#fn:246"><sup>246</sup></a></td><td rowspan="3">640<a class="footnote-ref" id="fnref:247" href="#fn:247"><sup>247</sup></a><a class="footnote-ref" id="fnref:248" href="#fn:248"><sup>248</sup></a></td><td rowspan="2">1.713 TFLOPS<a class="footnote-ref" id="fnref:249" href="#fn:249"><sup>249</sup></a></td></tr><tr><td>3.24 GHz</td><td rowspan="2">6 GB</td></tr><tr><th><a href="/facts/Apple_A16/MCduVutl">A16Bionic</a></th><td>APL1W10<p><a class="footnote-ref" id="fnref:250" href="#fn:250"><sup>250</sup></a></p></td><td>T8120</td><td></td><td><a href="/facts/5_nm_process/5NndITJ3">4 nm</a>(N4P)<a href="/facts/FinFET/xox63kP7">FinFET</a><p><a class="footnote-ref" id="fnref:251" href="#fn:251"><sup>251</sup></a><a class="footnote-ref" id="fnref:252" href="#fn:252"><sup>252</sup></a><a class="footnote-ref" id="fnref:253" href="#fn:253"><sup>253</sup></a><a class="footnote-ref" id="fnref:254" href="#fn:254"><sup>254</sup></a><a class="footnote-ref" id="fnref:255" href="#fn:255"><sup>255</sup></a></p></td><td>16 billion</td><td>112.75 mm2</td><td>Everest<a class="footnote-ref" id="fnref:256" href="#fn:256"><sup>256</sup></a><a class="footnote-ref" id="fnref:257" href="#fn:257"><sup>257</sup></a></td><td>3.46 GHz</td><td>Sawtooth<a class="footnote-ref" id="fnref:258" href="#fn:258"><sup>258</sup></a><a class="footnote-ref" id="fnref:259" href="#fn:259"><sup>259</sup></a></td><td rowspan="2">P-core:16 MBE-core:4 MB<p><a class="footnote-ref" id="fnref:260" href="#fn:260"><sup>260</sup></a></p></td><td rowspan="2">24 MB<p><a class="footnote-ref" id="fnref:261" href="#fn:261"><sup>261</sup></a></p></td><td>6thgeneration Apple-designed</td><td rowspan="2">1398 MHz<a class="footnote-ref" id="fnref:262" href="#fn:262"><sup>262</sup></a></td><td>1.789 TFLOPS<a class="footnote-ref" id="fnref:263" href="#fn:263"><sup>263</sup></a></td><td>17 TOPS</td><td rowspan="2"><a href="/facts/LPDDR5/2XdLrg47">LPDDR5</a>-6400 (3200 MHz)</td><td rowspan="2">51.2 GB/s</td><td>September 16, 2022</td></tr><tr><th><a href="/facts/Apple_A17/tf5mmo8D">A17Pro</a></th><td>APL1V02</td><td>T8130</td><td></td><td><a href="/facts/3_nm_process/zR3mn68L">3 nm</a> (N3B) <a href="/facts/FinFET/xox63kP7">FinFET</a></td><td>19 billion</td><td>103.80 mm2</td><td>Everest (2nd generation)</td><td>3.78 GHz<a class="footnote-ref" id="fnref:264" href="#fn:264"><sup>264</sup></a></td><td>Sawtooth (2nd generation)</td><td>2.11 GHz<a class="footnote-ref" id="fnref:265" href="#fn:265"><sup>265</sup></a></td><td>7thgeneration Apple-designed</td><td>6</td><td>24</td><td>768</td><td>2.147 TFLOPS<a class="footnote-ref" id="fnref:266" href="#fn:266"><sup>266</sup></a></td><td rowspan="3">35 TOPS</td><td rowspan="3">8 GB</td><td>September 22, 2023</td></tr><tr><th><a href="/facts/Apple_A18/zSk5E19c">A18</a></th><td>APL1V08</td><td></td><td rowspan="2"></td><td rowspan="2"><a href="/facts/3_nm_process/zR3mn68L">3 nm</a> (N3E) <a href="/facts/FinFET/xox63kP7">FinFET</a></td><td rowspan="2"></td><td>90 mm2 <a class="footnote-ref" id="fnref:267" href="#fn:267"><sup>267</sup></a></td><td rowspan="2"><a href="/facts/AArch64/bauXRos7">ARMv9.2-A</a><a class="footnote-ref" id="fnref:268" href="#fn:268"><sup>268</sup></a></td><td rowspan="2">Everest (3rd generation)</td><td rowspan="2">4.05 GHz</td><td rowspan="2">Sawtooth (3rd generation)</td><td rowspan="2">2.42 GHz<a class="footnote-ref" id="fnref:269" href="#fn:269"><sup>269</sup></a></td><td rowspan="2"></td><td>P-core:8 MBE-core:4 MB</td><td></td><td>12 MB<p><a class="footnote-ref" id="fnref:270" href="#fn:270"><sup>270</sup></a></p></td><td rowspan="2">8thgeneration Apple-designed</td><td>5</td><td>20<a class="footnote-ref" id="fnref:271" href="#fn:271"><sup>271</sup></a></td><td>640<a class="footnote-ref" id="fnref:272" href="#fn:272"><sup>272</sup></a></td><td rowspan="2">1490 MHz<a class="footnote-ref" id="fnref:273" href="#fn:273"><sup>273</sup></a></td><td>1.907 TFLOPS</td><td rowspan="2"><a href="/facts/LPDDR/2XdLrg47">LPDDR5X</a>-7500 (3750 MHz)</td><td rowspan="2">60.0 GB/s<a class="footnote-ref" id="fnref:274" href="#fn:274"><sup>274</sup></a></td><td rowspan="2">September 9, 2024</td></tr><tr><th><a href="/facts/Apple_A18/zSk5E19c">A18Pro</a></th><td>APL1V07</td><td>T8140</td><td>105 mm2<a class="footnote-ref" id="fnref:275" href="#fn:275"><sup>275</sup></a></td><td>P-core:16 MBE-core:4 MB</td><td></td><td>24 MB<p><a class="footnote-ref" id="fnref:276" href="#fn:276"><sup>276</sup></a></p></td><td>6</td><td>24<a class="footnote-ref" id="fnref:277" href="#fn:277"><sup>277</sup></a></td><td>768<a class="footnote-ref" id="fnref:278" href="#fn:278"><sup>278</sup></a></td><td>2.289 TFLOPS</td></tr><tr><th rowspan="2">Name</th><th rowspan="2">Codename</th><th rowspan="2">Part No.</th><th rowspan="2">Image</th><th rowspan="2">Node</th><th rowspan="2">Manufacturer</th><th rowspan="2">Transistors count</th><th rowspan="2">Die size</th><th rowspan="2">CPU <a href="/facts/Instruction_set/8p8vwUeE">ISA</a></th><th rowspan="2">Bit width</th><th>Core name</th><th>Cores</th><th>Core speed</th><th>Core name</th><th>Cores</th><th>Core speed</th><th rowspan="2">Overall cores</th><th>L1</th><th>L2</th><th>L3</th><th>SLC</th><th rowspan="2">Vendor</th><th rowspan="2">Cores</th><th rowspan="2">SIMD EU count</th><th rowspan="2">FP32 ALU count</th><th rowspan="2">Frequency</th><th rowspan="2">FP32 FLOPS</th><th rowspan="2">Cores</th><th rowspan="2">OPS</th><th rowspan="2">Memory bus width</th><th rowspan="2">Total channelBit per channel</th><th rowspan="2">Memory type</th><th rowspan="2">Theoreticalbandwidth</th><th rowspan="2">Available capacity</th><th rowspan="3">First release</th></tr><tr><th colspan="3">Performance core</th><th colspan="3">Efficiency core</th><th colspan="4">Cache</th></tr><tr><th colspan="4">General</th><th colspan="4"><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th colspan="2">Computer architecture</th><th colspan="11">CPU</th><th colspan="6">GPU</th><th colspan="2"><a href="/facts/AI_accelerator/k0QuXHIb">AI accelerator</a></th><th colspan="5"><a href="/facts/Mobile_DDR/2XdLrg47">Memory technology</a></th></tr></tbody></table> <h2 id="mseries-socs"><i>M</i> series SoCs</h2> <p>The Apple <i>M</i> series is a family of <a href="/facts/System_on_a_chip/1RVvVe6N">systems on a chip</a> (SoC) used in <a href="/facts/Macintosh/8GhnXTK0">Mac computers</a> from November 2020 or later, <a href="/facts/IPad_Pro/thoY4y43">iPad Pro</a> tablets from April 2021 or later, <a href="/facts/IPad_Air/FzUDtnv8">iPad Air</a> tablets from March 2022 or later, and <a href="/facts/Vision_Pro/N7Tkaj68">Vision Pro</a>. The <i>M</i> designation was previously used for <a href="/facts/Apple_motion_coprocessors/GKLPF78J">Apple motion coprocessors</a>. </p> <table><tbody><tr><th>Evolution of Apple <i>M</i> series</th></tr><tr><td><table><tbody><tr><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M1/vaTA4u2J">M1</a>November 10, 2020 – May 7, 2024</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M1/vaTA4u2J">M1 Pro</a>October 18, 2021 – January 17, 2023</td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M1/vaTA4u2J">M1 Max</a>October 18, 2021 – June 5, 2023</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="2"></td><td colspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M1/vaTA4u2J">M1 Ultra</a>March 8, 2022 – June 5, 2023</td></tr><tr><td colspan="2"></td><td colspan="2"></td><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M2/xhYXgnsN">M2</a>June 6, 2022 – present</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M2/xhYXgnsN">M2 Pro</a>January 17, 2023 – October 29, 2024</td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M2/xhYXgnsN">M2 Max</a>January 17, 2023 – March 4, 2025</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="2"></td><td colspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M2/xhYXgnsN">M2 Ultra</a>June 5, 2023 – present</td></tr><tr><td colspan="2"></td><td colspan="2"></td><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M3/VIt7M4fB">M3</a>October 30, 2023 – present</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M3/VIt7M4fB">M3 Pro</a>October 30, 2023 – October 30, 2024</td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M3/VIt7M4fB">M3 Max</a>October 30, 2023 – October 30, 2024</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="2"></td><td colspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M3/VIt7M4fB">M3 Ultra</a>March 12, 2025 – present</td></tr><tr><td colspan="2"></td><td colspan="2"></td><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M4/4NFTxyKQ">M4</a>May 7, 2024 – present</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M4/4NFTxyKQ">M4 Pro</a>October 29, 2024 – present</td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_M4/4NFTxyKQ">M4 Max</a>October 30, 2024 – present</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td colspan="2"></td></tr></tbody></table></td></tr></tbody></table> <h3>Apple M1</h3> <p class="note">Main article: <a href="/facts/Apple_M1/vaTA4u2J">Apple M1</a></p> <p>The M1, Apple's first system on a chip designed for use in Macs, is manufactured using <a href="/facts/TSMC/B4BdojRk">TSMC</a>'s 5 nm process. Announced on November 10, 2020, it was first used in the <a href="/facts/MacBook_Air_(Apple_silicon)/uBtgKzYJ">MacBook Air</a>, <a href="/facts/Mac_Mini/fVAgG2eN">Mac mini</a> and <a href="/facts/MacBook_Pro/d1DuazCK">13-inch MacBook Pro</a>, and later used in the <a href="/facts/IMac_(Apple_silicon)/Cgwffx68">iMac</a>, <a href="/facts/IPad_Pro_(5th_generation)/gEPQE0dr">5th-generation iPad Pro</a> and <a href="/facts/IPad_Air_(5th_generation)/5pYGQucy">5th-generation iPad Air</a>. It comes with 4 performance cores and 4 efficiency cores, for a total of 8 CPU cores. It comes with up to 8 GPU cores, with the entry level MacBook Air having only 7 GPU cores. The M1 has 16 billion transistors.<a class="footnote-ref" id="fnref:279" href="#fn:279"><sup>279</sup></a> </p> <h4>Apple M1 Pro</h4> <p>The M1 Pro is a more powerful version of the M1, with six to eight performance cores, two efficiency cores, 14 to 16 GPU cores, 16 Neural Engine cores, up to 32 GB unified RAM with up to 200 GB/s memory bandwidth, and more than double the transistors. It was announced on October 18, 2021, and is used in the 14- and 16-inch <a href="/facts/MacBook_Pro/d1DuazCK">MacBook Pro</a>. Apple claimed the CPU performance is about 70% faster than the M1, and that its GPU performance is about double. Apple claims the M1 Pro can deliver up to 20 streams of 4K or 7 streams of 8K ProRes video playback (up from 6 offered by Afterburner card for <a href="/facts/Mac_Pro/aS0qSBTl">2019 Mac Pro</a>). </p> <h4>Apple M1 Max</h4> <p>The M1 Max is a larger version of the M1 Pro chip, with eight performance cores, two efficiency cores, 24 to 32 GPU cores, 16 Neural Engine cores, up to 64 GB unified RAM with up to 400 GB/s memory bandwidth, and more than double the number of transistors. It was announced on October 18, 2021, and is used in the 14- and 16-inch <a href="/facts/MacBook_Pro/d1DuazCK">MacBook Pro</a>, as well as the <a href="/facts/Mac_Studio/lPg3pbSu">Mac Studio</a>. Apple claims the M1 Max can deliver up to 30 streams of 4K (up from 23 offered by Afterburner card for 2019 Mac Pro) or 7 streams of 8K ProRes video playback. </p> <h4>Apple M1 Ultra</h4> <p>The M1 Ultra consists of two M1 Max dies connected together by a silicon interposer through Apple's UltraFusion interconnect.<a class="footnote-ref" id="fnref:280" href="#fn:280"><sup>280</sup></a> It has 114 billion transistors, 16 performance cores, 4 efficiency cores, 48 to 64 GPU cores and 32 Neural Engine cores; it can be configured with up to 128 GB unified RAM of 800 GB/s memory bandwidth. It was announced on March 8, 2022, as an optional upgrade for the <a href="/facts/Mac_Studio/lPg3pbSu">Mac Studio</a>. Apple claims the M1 Ultra can deliver up to 18 streams of 8K ProRes video playback.<a class="footnote-ref" id="fnref:281" href="#fn:281"><sup>281</sup></a> </p> <h3>Apple M2</h3> <p class="note">Main article: <a href="/facts/Apple_M2/xhYXgnsN">Apple M2</a></p> <p>Apple announced the M2 SoC on June 6, 2022, at <a href="/facts/WWDC/hEjVWkoo">WWDC</a>, along with a redesigned MacBook Air and a revised 13-inch MacBook Pro and later the <a href="/facts/IPad_Pro_(6th_generation)/3Clx4Y4Q">sixth-generation iPad Pro</a> and the <a href="/facts/IPad_Air_(6th_generation)/0xrlGK2G">sixth-generation iPad Air</a>. The M2 is made with TSMC's "enhanced 5-nanometer technology" N5P process and contains 20 billion transistors, a 25% increase from the previous generation M1. The M2 can be configured with up to 24 gigabytes of RAM and 2 terabytes of storage. It has 8 CPU cores (4 performance and 4 efficiency) and up to 10 GPU cores. The M2 also increases the memory bandwidth to 100 GB/s. Apple claims CPU improvements up to 18% and GPU improvements up to 35% compared to the previous M1.<a class="footnote-ref" id="fnref:282" href="#fn:282"><sup>282</sup></a> </p> <h4>Apple M2 Pro</h4> <p>The M2 Pro is a more powerful version of the M2, with six to eight performance cores, four efficiency cores, 16 to 19 GPU cores, 16 Neural Engine cores, up to 32 GB unified RAM with up to 200 GB/s memory bandwidth, and double the transistors. It was announced on January 17, 2023, in a press release and it is used in the 14- and 16-inch 2023 <a href="/facts/MacBook_Pro/d1DuazCK">MacBook Pro</a> as well as the <a href="/facts/Mac_Mini/fVAgG2eN">Mac Mini</a>. Apple claims the CPU performance is 20 percent faster than the M1 Pro and the GPU is 30 percent faster than the M1 Pro.<a class="footnote-ref" id="fnref:283" href="#fn:283"><sup>283</sup></a> </p> <h4>Apple M2 Max</h4> <p>The M2 Max is a larger version of the M2 Pro, with eight performance cores, four efficiency cores, 30 to 38 GPU cores, 16 Neural Engine cores, up to 96 GB unified RAM with up to 400 GB/s memory bandwidth, and more than double the transistors. It was announced on January 17, 2023, in a press release and it is used in the 14- and 16-inch 2023 <a href="/facts/MacBook_Pro/d1DuazCK">MacBook Pro</a>, as well as the <a href="/facts/Mac_Studio/lPg3pbSu">Mac Studio</a>.<a class="footnote-ref" id="fnref:284" href="#fn:284"><sup>284</sup></a> Apple claims the CPU performance is 20 percent faster than M1 Max and the GPU is 30 percent faster than the M1 Max.<a class="footnote-ref" id="fnref:285" href="#fn:285"><sup>285</sup></a> </p> <h4>Apple M2 Ultra</h4> <p>The M2 Ultra consists of two M2 Max dies connected together by a silicon interposer through Apple's UltraFusion interconnect. It has 134 billion transistors, 16 performance cores, 8 efficiency cores, 60 to 76 GPU cores and 32 Neural Engine cores; it can be configured with up to 192 GB unified RAM of 800 GB/s memory bandwidth. It was announced on June 5, 2023, as an optional upgrade for the <a href="/facts/Mac_Studio/lPg3pbSu">Mac Studio</a> and the sole processor for the <a href="/facts/Mac_Pro/aS0qSBTl">Mac Pro</a>. Apple claims the M2 Ultra can deliver up to 22 streams of 8K ProRes video playback.<a class="footnote-ref" id="fnref:286" href="#fn:286"><sup>286</sup></a> </p> <h3>Apple M3</h3> <p class="note">Main article: <a href="/facts/Apple_M3/VIt7M4fB">Apple M3</a></p> <p>Apple announced the M3 series of chips on October 30, 2023, along with the new MacBook Pro and iMac, and later used in the MacBook Air and the <a href="/facts/IPad_Air_(7th_generation)/03kbgj1w">seventh-generation iPad Air</a>. The M3 is based on the <a href="/facts/3_nm_process/zR3mn68L">3 nm process</a> and contains 25 billion transistors, a 25% increase from the previous generation M2. It has 8 CPU cores (4 performance and 4 efficiency) and up to 10 GPU cores. Apple claims CPU improvements up to 35% and GPU improvements up to 65% compared to the M1.<a class="footnote-ref" id="fnref:287" href="#fn:287"><sup>287</sup></a> </p> <h4>Apple M3 Pro</h4> <p>The M3 Pro is a more powerful version of the M3, with five or six performance cores, six efficiency cores, 14 to 18 GPU cores, 16 Neural Engine cores, up to 36 GB unified RAM with 150 GB/s memory bandwidth, and 48% more transistors. It is used in the 14- and 16-inch <a href="/facts/MacBook_Pro/d1DuazCK">MacBook Pro</a>. Apple claims the CPU performance is 30 percent faster than the M1 Pro and the GPU is 40 percent faster than the M1 Pro.<a class="footnote-ref" id="fnref:288" href="#fn:288"><sup>288</sup></a> </p> <h4>Apple M3 Max</h4> <p>The M3 Max is a larger version of the M3 Pro, with ten or twelve performance cores, four efficiency cores, 30 to 40 GPU cores, 16 Neural Engine cores, up to 128 GB unified RAM with up to 400 GB/s memory bandwidth, and more than double the transistors. It is used in the 14- and 16-inch <a href="/facts/MacBook_Pro/d1DuazCK">MacBook Pro</a>. Apple claims the CPU performance is 80 percent faster than the M1 Max and the GPU is 50 percent faster than the M1 Max.<a class="footnote-ref" id="fnref:289" href="#fn:289"><sup>289</sup></a> </p> <h4>Apple M3 Ultra</h4> <p>The M3 Ultra consists of two M3 Max dies connected together by a silicon interposer through Apple's UltraFusion interconnect. It has 184 billion transistors, 20 or 24 performance cores, 8 efficiency cores, 60 to 80 GPU cores and 32 Neural Engine cores; it can be configured with up to 512 GB unified RAM of 800 GB/s memory bandwidth. It was announced on March 5, 2025, as an optional upgrade for the <a href="/facts/Mac_Studio/lPg3pbSu">Mac Studio</a>. Apple claims the M3 Ultra can deliver up to 24 streams of 8K ProRes video playback.<a class="footnote-ref" id="fnref:290" href="#fn:290"><sup>290</sup></a> </p> <h3>Apple M4</h3> <p class="note">Main article: <a href="/facts/Apple_M4/4NFTxyKQ">Apple M4</a></p> <p>Apple announced the M4 chip on May 7, 2024, along with the <a href="/facts/IPad_Pro_(7th_generation)/bjk1x8P4">seventh-generation iPad Pro</a>; it would later be used for the iMac, Mac Mini, MacBook Pro and MacBook Air. The M4 is based on a "second-generation 3-nanometer" process and contains 28 billion transistors. It has up to 10 CPU cores (3 or 4 performance and 4 or 6 efficiency) and up to 10 GPU cores. Apple claims the M4 has up to 1.5x faster CPU performance compared to the M2.<a class="footnote-ref" id="fnref:291" href="#fn:291"><sup>291</sup></a> </p> <h4>Apple M4 Pro</h4> <p>The M4 Pro is a more powerful version of the M4, with eight or ten performance cores, four efficiency cores, 16 to 20 GPU cores, 16 Neural Engine cores, and up to 64 GB unified RAM with 273 GB/s memory bandwidth. It is used in the 14- and 16-inch <a href="/facts/MacBook_Pro/d1DuazCK">MacBook Pro</a> as well as the <a href="/facts/Mac_Mini/fVAgG2eN">Mac Mini</a>. Apple claims the CPU performance is 1.9x faster than the M1 Pro and the GPU is 2x faster than the M1 Pro.<a class="footnote-ref" id="fnref:292" href="#fn:292"><sup>292</sup></a> </p> <h4>Apple M4 Max</h4> <p>The M4 Max is a larger version of the M4 Pro, with ten or twelve performance cores, four efficiency cores, 32 to 40 GPU cores, 16 Neural Engine cores, and up to 128 GB unified RAM with up to 546 GB/s memory bandwidth. It is used in the 14- and 16-inch <a href="/facts/MacBook_Pro/d1DuazCK">MacBook Pro</a> as well as the <a href="/facts/Mac_Studio/lPg3pbSu">Mac Studio</a>. Apple claims the CPU performance is 2.2x faster than the M1 Max and the GPU is 1.9x faster than the M1 Max.<a class="footnote-ref" id="fnref:293" href="#fn:293"><sup>293</sup></a> </p> <h3>Comparison of <i>M</i>-series processors</h3> <table><tbody><tr><th colspan="3">General</th><th colspan="4"><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th colspan="11">CPU</th><th colspan="7">GPU</th><th colspan="2"><a href="/facts/AI_accelerator/k0QuXHIb">AI accelerator</a></th><th colspan="5">Media Engine</th><th colspan="5"><a href="/facts/Mobile_DDR/2XdLrg47">Memory technology</a></th><th rowspan="3">First release</th></tr><tr><th rowspan="2">Name</th><th rowspan="2">Codenameand part no.</th><th rowspan="2">Image</th><th rowspan="2">Process</th><th rowspan="2">Transistor count</th><th rowspan="2">Die size</th><th rowspan="2">Transistor density</th><th rowspan="2">CPU <a href="/facts/Instruction_set/8p8vwUeE">ISA</a></th><th colspan="3">Performance core</th><th colspan="3">Efficiency core</th><th rowspan="2">Overall cores</th><th colspan="3">Cache</th><th rowspan="2">Vendor</th><th rowspan="2">Cores</th><th rowspan="2">SIMD EU count</th><th rowspan="2">FP32 ALU count</th><th rowspan="2">Frequency</th><th rowspan="2">FP32 FLOPS(TFLOPS)</th><th rowspan="2">Hardware-accelerated ray tracing</th><th rowspan="2">Cores</th><th rowspan="2">OPS</th><th rowspan="2">Hardware Acceleration</th><th colspan="4">Media Decode/Encode Engine</th><th rowspan="2">Memory bus width</th><th rowspan="2">Total channelBit per channel</th><th rowspan="2">Memory type</th><th rowspan="2">Theoreticalbandwidth</th><th rowspan="2">Available capacity</th></tr><tr><th>Core name</th><th>Cores</th><th>Core speed</th><th>Core name</th><th>Cores</th><th>Core speed</th><th>L1</th><th>L2</th><th>SLC</th><th>Video decode</th><th>Video encode</th><th>ProRes decode & encode</th><th>AV1 decode</th></tr><tr><th rowspan="2"><a href="/facts/Apple_M1/vaTA4u2J">M1</a></th><td rowspan="2">APL1102T8103</td><td rowspan="2"></td><td rowspan="9"><a href="/facts/TSMC/B4BdojRk">TSMC</a>N5</td><td rowspan="2">16 billion</td><td rowspan="2">118.91 mm2<a class="footnote-ref" id="fnref:294" href="#fn:294"><sup>294</sup></a></td><td rowspan="2">~134 MTr/mm2</td><td rowspan="9"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.5-A<a class="footnote-ref" id="fnref:295" href="#fn:295"><sup>295</sup></a></td><td rowspan="9">Firestorm</td><td rowspan="2">4</td><td rowspan="2">3.20 GHz</td><td rowspan="9">Icestorm</td><td rowspan="2">4</td><td rowspan="9">2.06 GHz</td><td rowspan="3"><a href="/facts/Multi-core_processor/ABNb65hQ">8-core</a></td><td rowspan="33">P-core:L1i: 192 KBL1d: 128 KBE-core:L1i: 128 KBL1d: 64 KB</td><td rowspan="2">P-core:12 MBE-core:4 MB</td><td rowspan="2">8 MB</td><td rowspan="9">4th generation Apple-designed</td><td>7</td><td>28</td><td>896</td><td rowspan="2">1278 MHz</td><td>2.290</td><td rowspan="18">No</td><td rowspan="7">16</td><td rowspan="7">11 TOPS</td><td rowspan="2">H264, HEVC</td><td rowspan="7">1</td><td rowspan="5">1</td><td rowspan="2">—</td><td rowspan="18">—</td><td rowspan="2">128-bit</td><td rowspan="2">2 channels64-bit/channel</td><td rowspan="2">LPDDR4X-4266(2133 MHz)</td><td rowspan="2">68.25 GB/s</td><td rowspan="2">8 GB16 GB</td><td rowspan="2">November 17, 2020</td></tr><tr><td>8</td><td>32</td><td>1024</td><td>2.617</td></tr><tr><th rowspan="3">M1 Pro</th><td rowspan="3">APL1103T6000</td><td rowspan="3"></td><td rowspan="3">33.7 billion</td><td rowspan="3">≈ 245 mm2<a class="footnote-ref" id="fnref:296" href="#fn:296"><sup>296</sup></a></td><td rowspan="3">~137 MTr/mm2</td><td>6</td><td rowspan="7">3.23 GHz</td><td rowspan="5">2</td><td rowspan="5">P-core:24 MBE-core:4 MB</td><td rowspan="3">24 MB</td><td rowspan="2">14</td><td rowspan="2">56</td><td rowspan="2">1792</td><td rowspan="7">1296 MHz</td><td rowspan="2">4.644</td><td rowspan="8">H264, HEVC, ProRes, ProRes RAW</td><td rowspan="3">1</td><td rowspan="3">256-bit</td><td rowspan="3">2 channels128-bit/channel</td><td rowspan="24"><a href="/facts/LPDDR5/2XdLrg47">LPDDR5</a>-6400(3200 MHz)</td><td rowspan="3">204.8 GB/s</td><td rowspan="3">16 GB32 GB</td><td rowspan="5">October 26, 2021</td></tr><tr><td rowspan="4">8</td><td rowspan="4"><a href="/facts/Multi-core_processor/ABNb65hQ">10-core</a></td></tr><tr><td>16</td><td>64</td><td>2048</td><td>5.308</td></tr><tr><th rowspan="2">M1 Max</th><td rowspan="2">APL1105T6001<a class="footnote-ref" id="fnref:297" href="#fn:297"><sup>297</sup></a></td><td rowspan="2"></td><td rowspan="2">57 billion</td><td rowspan="2">≈ 432 mm2<a class="footnote-ref" id="fnref:298" href="#fn:298"><sup>298</sup></a></td><td rowspan="4">~132 MTr/mm2</td><td rowspan="2">48 MB</td><td>24</td><td>96</td><td>3072</td><td>7.962</td><td rowspan="2">2</td><td rowspan="2">2</td><td rowspan="2">512-bit</td><td rowspan="2">4 channels128-bit/channel</td><td rowspan="2">409.6 GB/s</td><td rowspan="2">32 GB64 GB</td></tr><tr><td>32</td><td>128</td><td>4096</td><td>10.616</td></tr><tr><th rowspan="2">M1 Ultra</th><td rowspan="2">APL1W06T6002</td><td rowspan="2"></td><td rowspan="2">114 billion</td><td rowspan="2">≈ 864 mm2</td><td rowspan="2">16</td><td rowspan="2">4</td><td rowspan="2"><a href="/facts/Multi-core_processor/ABNb65hQ">20-core</a></td><td rowspan="2">P-core:48 MBE-core:8 MB</td><td rowspan="2">96 MB</td><td>48</td><td>192</td><td>6144</td><td>15.925</td><td rowspan="2">32</td><td rowspan="2">22 TOPS</td><td rowspan="2">2</td><td rowspan="2">4</td><td rowspan="2">4</td><td rowspan="2">1024-bit</td><td rowspan="2">8 channels128-bit/channel</td><td rowspan="2">819.2 GB/s</td><td rowspan="2">64 GB128 GB</td><td rowspan="2">March 18, 2022</td></tr><tr><td>64</td><td>256</td><td>8192</td><td>21.233</td></tr><tr><th rowspan="3"><a href="/facts/Apple_M2/xhYXgnsN">M2</a></th><td rowspan="3">APL1109T8112</td><td rowspan="3"></td><td rowspan="9"><a href="/facts/TSMC/B4BdojRk">TSMC</a>N5P</td><td rowspan="3">20 billion</td><td rowspan="3">155.25 mm2<a class="footnote-ref" id="fnref:299" href="#fn:299"><sup>299</sup></a></td><td rowspan="3">~129 MTr/mm2</td><td rowspan="17"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.6-A<a class="footnote-ref" id="fnref:300" href="#fn:300"><sup>300</sup></a></td><td rowspan="9">Avalanche</td><td rowspan="3">4</td><td rowspan="5">3.50 GHz</td><td rowspan="9">Blizzard</td><td rowspan="7">4</td><td rowspan="9">2.42 GHz</td><td rowspan="3"><a href="/facts/Multi-core_processor/ABNb65hQ">8-core</a></td><td rowspan="3">P-core:16 MBE-core:4 MB</td><td rowspan="3">8 MB</td><td rowspan="9">5th generation Apple-designed</td><td>8</td><td>32</td><td>1024</td><td rowspan="9">1398 MHz</td><td>2.863</td><td rowspan="7">16</td><td rowspan="7">15.8 TOPS</td><td rowspan="7">1</td><td rowspan="5">1</td><td>1</td><td rowspan="3">128-bit</td><td rowspan="3">2 channels64-bit/channel</td><td rowspan="3">102.4 GB/s</td><td rowspan="3">8 GB16 GB24 GB</td><td rowspan="3">June 24, 2022</td></tr><tr><td>9 <a class="footnote-ref" id="fnref:301" href="#fn:301"><sup>301</sup></a></td><td>36</td><td>1152</td><td rowspan="2">3.578</td><td>H264, HEVC</td><td>—</td></tr><tr><td>10</td><td>40</td><td>1280</td><td rowspan="22">H264, HEVC, ProRes, ProRes RAW</td><td rowspan="3">1</td></tr><tr><th rowspan="2">M2 Pro</th><td rowspan="2">APL1113T6020</td><td rowspan="2"></td><td rowspan="2">40 billion</td><td rowspan="2">~289 mm2<a class="footnote-ref" id="fnref:302" href="#fn:302"><sup>302</sup></a></td><td rowspan="2">~138 MTr/mm2</td><td>6</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">10-core</a></td><td rowspan="4">P-core:32 MBE-core:4 MB</td><td rowspan="2">24 MB</td><td>16</td><td>64</td><td>2048</td><td>5.726</td><td rowspan="2">256-bit</td><td rowspan="2">4 channels64-bit/channel</td><td rowspan="2">204.8 GB/s</td><td rowspan="2">16 GB32 GB</td><td rowspan="4">January 24, 2023</td></tr><tr><td rowspan="3">8</td><td rowspan="3"><a href="/facts/Multi-core_processor/ABNb65hQ">12-core</a></td><td>19</td><td>76</td><td>2432</td><td>6.799</td></tr><tr><th rowspan="2">M2 Max</th><td rowspan="2">APL1111T6021</td><td rowspan="2"></td><td rowspan="2">67 billion</td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2">3.69 GHz<a class="footnote-ref" id="fnref:303" href="#fn:303"><sup>303</sup></a></td><td rowspan="2">48 MB</td><td>30</td><td>120</td><td>3840</td><td>10.736</td><td rowspan="2">2</td><td rowspan="2">2</td><td rowspan="2">512-bit</td><td rowspan="2">4 channels128-bit/channel</td><td rowspan="2">409.6 GB/s</td><td rowspan="2">32 GB64 GB96 GB</td></tr><tr><td>38</td><td>152</td><td>4864</td><td>13.599</td></tr><tr><th rowspan="2">M2 Ultra</th><td rowspan="2">APL1W12T6022</td><td rowspan="2"></td><td rowspan="2">134 billion</td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2">16</td><td rowspan="2">~3.00 GHz-3.70 GHz<a class="footnote-ref" id="fnref:304" href="#fn:304"><sup>304</sup></a><a class="footnote-ref" id="fnref:305" href="#fn:305"><sup>305</sup></a><a class="footnote-ref" id="fnref:306" href="#fn:306"><sup>306</sup></a></td><td rowspan="2">8</td><td rowspan="2"><a href="/facts/Multi-core_processor/ABNb65hQ">24-core</a></td><td rowspan="2">P-core:64 MBE-core:8 MB</td><td rowspan="2">96 MB</td><td>60</td><td>240</td><td>7680</td><td>21.473</td><td rowspan="2">32</td><td rowspan="2">31.6 TOPS</td><td rowspan="2">2</td><td rowspan="2">4</td><td rowspan="2">4</td><td rowspan="2">1024-bit</td><td rowspan="2">8 channels128-bit/channel</td><td rowspan="2">819.2 GB/s</td><td rowspan="2">64 GB128 GB192 GB</td><td rowspan="2">June 13, 2023</td></tr><tr><td>76</td><td>304</td><td>9728</td><td>27.199</td></tr><tr><th rowspan="2"><a href="/facts/Apple_M3/VIt7M4fB">M3</a></th><td rowspan="2">APL1201 T8122</td><td rowspan="2"></td><td rowspan="8"><a href="/facts/TSMC/B4BdojRk">TSMC</a>N3B</td><td rowspan="2">25 billion</td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="15">—</td><td rowspan="2">4</td><td rowspan="8">4.05 GHz</td><td rowspan="15">—</td><td rowspan="2">4</td><td rowspan="8">2.75 GHz</td><td rowspan="2"><a href="/facts/Multi-core_processor/ABNb65hQ">8-core</a></td><td rowspan="4">P-core:16 MBE-core:4 MB</td><td rowspan="2">8 MB</td><td rowspan="8">7th generation Apple-designed</td><td>8</td><td>128</td><td>1024</td><td rowspan="8">1380 MHz<p><a class="footnote-ref" id="fnref:307" href="#fn:307"><sup>307</sup></a></p></td><td>2.826</td><td rowspan="15">Yes</td><td rowspan="15">16</td><td rowspan="6">18 TOPS</td><td rowspan="6">1</td><td rowspan="4">1</td><td rowspan="4">1</td><td rowspan="6">1</td><td rowspan="2">128-bit</td><td rowspan="2">2 channels64-bit/channel</td><td rowspan="2">102.4 GB/s</td><td rowspan="2">8 GB16 GB24 GB</td><td rowspan="6">November 7, 2023</td></tr><tr><td>10</td><td>160</td><td>1280</td><td>3.533</td></tr><tr><th rowspan="2">M3 Pro</th><td rowspan="2">APL1203T6030</td><td rowspan="2"></td><td rowspan="2">37 billion</td><td rowspan="2"></td><td rowspan="2"></td><td>5</td><td rowspan="2">6</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">11-core</a></td><td rowspan="2">12 MB</td><td>14</td><td>224</td><td>1792</td><td>4.946</td><td rowspan="2">192-bit</td><td rowspan="2">3 channels64-bit/channel</td><td rowspan="2">153.6 GB/s</td><td rowspan="2">18 GB36 GB</td></tr><tr><td>6</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">12-core</a></td><td>18</td><td>288</td><td>2304</td><td>6.359</td></tr><tr><th rowspan="2">M3 Max</th><td>APL1204T6034</td><td rowspan="2"></td><td rowspan="2">92 billion</td><td rowspan="2"></td><td rowspan="2"></td><td>10</td><td rowspan="2">4</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">14-core</a></td><td rowspan="2">P-core:32 MBE-core:4 MB</td><td rowspan="2">48 MB</td><td>30</td><td>480</td><td>3840</td><td>10.598</td><td rowspan="2">2</td><td rowspan="2">2</td><td>384-bit</td><td>3 channels128-bit/channel</td><td>307.2 GB/s</td><td>36 GB96 GB</td></tr><tr><td>APL1204T6031</td><td>12</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">16-core</a></td><td>40</td><td>640</td><td>5120</td><td>14.131</td><td>512-bit</td><td>4 channels128-bit/channel</td><td>409.6 GB/s</td><td>48 GB64 GB128 GB</td></tr><tr><th rowspan="2">M3 Ultra</th><td rowspan="2">T6032</td><td rowspan="2"></td><td rowspan="2">184 billion</td><td rowspan="2"></td><td rowspan="2"></td><td>20</td><td rowspan="2">8</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">28-core</a></td><td rowspan="2">P-core:64 MBE-core:8 MB</td><td rowspan="2">96 MB</td><td>60</td><td>960</td><td>7680</td><td>21.197</td><td rowspan="2">36 TOPS</td><td rowspan="2">2</td><td rowspan="2">4</td><td rowspan="2">4</td><td rowspan="2">2</td><td rowspan="2">1024-bit</td><td rowspan="2">8 channels128-bit/channel</td><td rowspan="2">819.2 GB/s</td><td>96 GB256 GB</td><td rowspan="2">March 12, 2025</td></tr><tr><td>24</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">32-core</a></td><td>80</td><td>1280</td><td>10240</td><td>28.262</td><td>96 GB256 GB512 GB</td></tr><tr><th rowspan="3"><a href="/facts/Apple_M4/4NFTxyKQ">M4</a></th><td rowspan="3">APL1206T8132</td><td rowspan="3"></td><td rowspan="7"><a href="/facts/TSMC/B4BdojRk">TSMC</a>N3E</td><td rowspan="3">28 billion</td><td rowspan="3"></td><td rowspan="3"></td><td rowspan="7"><a href="/facts/ARMv9/SALsYA79">ARMv9</a><p><a class="footnote-ref" id="fnref:308" href="#fn:308"><sup>308</sup></a></p></td><td>4</td><td rowspan="3">4.40 GHz</td><td>4</td><td rowspan="3">2.85 GHz</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">8-core</a></td><td rowspan="3">P-core:16 MBE-core:4 MB</td><td rowspan="3"></td><td rowspan="7">8th generation Apple-designed</td><td>8</td><td>128</td><td>1024</td><td rowspan="3">1470 MHz<p><a class="footnote-ref" id="fnref:309" href="#fn:309"><sup>309</sup></a></p></td><td></td><td rowspan="7">38 TOPS</td><td rowspan="3">1</td><td rowspan="3">1</td><td rowspan="3">1</td><td rowspan="3">1</td><td rowspan="3">128-bit</td><td rowspan="3">2 channels64-bit/channel</td><td rowspan="3"><a href="/facts/LPDDR/2XdLrg47">LPDDR5X</a>-7500 (3750 MHz)</td><td rowspan="3">120 GB/s</td><td rowspan="3">8 GB16 GB24 GB32 GB</td><td rowspan="3">May 15, 2024</td></tr><tr><td>3</td><td rowspan="2">6</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">9-core</a></td><td rowspan="2">10</td><td rowspan="2">160</td><td rowspan="2">1280</td><td rowspan="2">4.26<a class="footnote-ref" id="fnref:310" href="#fn:310"><sup>310</sup></a></td></tr><tr><td>4</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">10-core</a></td></tr><tr><th rowspan="2">M4 Pro</th><td rowspan="2">T6040</td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td>8</td><td rowspan="4">4.51 GHz</td><td rowspan="2">4</td><td rowspan="2"></td><td><a href="/facts/Multi-core_processor/ABNb65hQ">12-core</a></td><td rowspan="2">P-core:2×16 MBE-core:4 MB</td><td rowspan="2"></td><td>16</td><td>256</td><td>2048</td><td rowspan="2">1578 MHz</td><td>6.82<a class="footnote-ref" id="fnref:311" href="#fn:311"><sup>311</sup></a></td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2">256-bit</td><td rowspan="2"></td><td rowspan="4"><a href="/facts/LPDDR/2XdLrg47">LPDDR5X</a>-8533 (4266 MHz)</td><td rowspan="2">273 GB/s</td><td rowspan="2">24 GB48 GB64 GB</td><td rowspan="4">November 8, 2024</td></tr><tr><td>10</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">14-core</a></td><td>20</td><td>320</td><td>2560</td><td>8.52<a class="footnote-ref" id="fnref:312" href="#fn:312"><sup>312</sup></a></td></tr><tr><th rowspan="2">M4 Max</th><td rowspan="2">T6041</td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td>10</td><td rowspan="2">4</td><td rowspan="2"></td><td><a href="/facts/Multi-core_processor/ABNb65hQ">14-core</a></td><td></td><td rowspan="2"></td><td>32</td><td>512</td><td>4096</td><td rowspan="2"></td><td>13.64<a class="footnote-ref" id="fnref:313" href="#fn:313"><sup>313</sup></a></td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td>384-bit</td><td></td><td>409.6 GB/s</td><td>36 GB</td></tr><tr><td>12</td><td><a href="/facts/Multi-core_processor/ABNb65hQ">16-core</a></td><td></td><td>40</td><td>640</td><td>5120</td><td>17.04<a class="footnote-ref" id="fnref:314" href="#fn:314"><sup>314</sup></a></td><td>512-bit</td><td></td><td>546 GB/s</td><td>48 GB64 GB128 GB</td></tr><tr><th rowspan="2">Name</th><th rowspan="2">Codenameand part no.</th><th rowspan="2">Image</th><th rowspan="2">Process</th><th rowspan="2">Transistor count</th><th rowspan="2">Die size</th><th rowspan="2">Transistor density</th><th rowspan="2">CPU <a href="/facts/Instruction_set/8p8vwUeE">ISA</a></th><th colspan="3">Performance core</th><th colspan="3">Efficiency core</th><th rowspan="2">Overall cores</th><th colspan="3">Cache</th><th rowspan="2">Vendor</th><th rowspan="2">Cores</th><th rowspan="2">SIMD EU count</th><th rowspan="2">FP32 ALU count</th><th rowspan="2">Frequency</th><th rowspan="2">FP32 FLOPS(TFLOPS)</th><th rowspan="2">Hardware-accelerated ray tracing</th><th rowspan="2">Cores</th><th rowspan="2">OPS</th><th rowspan="2">Hardware Acceleration</th><th colspan="4">Media Decode/Encode Engine</th><th rowspan="2">Memory bus width</th><th rowspan="2">Total channelBit per channel</th><th rowspan="2">Memory type</th><th rowspan="2">Theoreticalbandwidth</th><th rowspan="2">Available capacity</th><th rowspan="3">First release</th></tr><tr><th>Core name</th><th>Cores</th><th>Core speed</th><th>Core name</th><th>Cores</th><th>Core speed</th><th>L1</th><th>L2</th><th>SLC</th><th>Video decode</th><th>Video encode</th><th>ProRes decode & encode</th><th>AV1 decode</th></tr><tr><th colspan="3">General</th><th colspan="4"><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th colspan="11">CPU</th><th colspan="7">GPU</th><th colspan="2"><a href="/facts/AI_accelerator/k0QuXHIb">AI accelerator</a></th><th colspan="5">Media Engine</th><th colspan="5"><a href="/facts/Mobile_DDR/2XdLrg47">Memory technology</a></th></tr></tbody></table> <h2 id="rseries-socs"><i>R</i> series SoCs</h2> <p>The <i>R</i> series is a family of low-latency <a href="/facts/System_on_a_chip/1RVvVe6N">system on a chips (SoCs)</a> for real-time processing of sensor inputs. </p> <h3>Apple R1</h3> <p>The Apple R1 was announced by Apple on June 5, 2023, at its <a href="/facts/Worldwide_Developers_Conference/hEjVWkoo">Worldwide Developers Conference</a>. It is used in the <a href="/facts/Apple_Vision_Pro/N7Tkaj68">Apple Vision Pro</a> headset. The Apple R1 is dedicated to the real time processing of sensor inputs and delivering extremely low-latency images to the displays. </p> <h2 id="sseries-sips"><i>S</i> series SiPs</h2> <table><tbody><tr><th>Evolution of Apple <i>S</i> series</th></tr><tr><td><table><tbody><tr><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_S1/X3fllftV">S1</a>September 9, 2014 – September 7, 2016</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_S2/mRGnWK9f">S2</a>September 7, 2016 – September 12, 2017</td><td></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr><td></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td><td></td><td></td><td colspan="6" rowspan="2"><a href="/facts/Apple_S1/X3fllftV">S1P</a>September 7, 2016 – September 12, 2018</td></tr><tr><td colspan="2"></td></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_S3/vqP7FluR">S3</a>September 12, 2017 – September 7, 2022</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2"><a href="/facts/Apple_S4/CLj1YWHe">S4</a>September 12, 2018 – September 10, 2019</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2">S5September 10, 2019 – present</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2">S6September 15, 2020 – September 14, 2021</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2">S7September 14, 2021 – September 7, 2022January 18, 2023 – present</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2">S8September 7, 2022 – present</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2">S9September 12, 2023 – present</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td><td rowspan="2"></td><td rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr><tr><td colspan="2" rowspan="2"></td><td colspan="6" rowspan="2">S10September 9, 2024 – present</td><td colspan="2" rowspan="2"></td><td colspan="2" rowspan="2"></td></tr><tr></tr></tbody></table></td></tr></tbody></table> <p>The Apple <i>S</i> series is a family of <a href="/facts/System_in_package/Tqdpp6hq">systems in a package (SiP)</a> used in the <a href="/facts/Apple_Watch/tJjbXQEa">Apple Watch</a> and <a href="/facts/HomePod/ToJVXQMc">HomePod</a>. It uses a customized <a href="/facts/Central_processing_unit/Jxp1bqMV">application processor</a> that together with <a href="/facts/Random-access_memory/DuD4bxh6">memory</a>, <a href="/facts/Flash_memory/Cn8JsStx">storage</a> and support processors for wireless connectivity, sensors, and <a href="/facts/I%2fO/WQTE8Jas">I/O</a> form a complete computer in a single package. </p> <h3>Apple S1</h3> <p class="note">Main article: <a href="/facts/Apple_S1/X3fllftV">Apple S1</a></p> <p>The Apple S1 is an integrated computer. It includes memory, storage and support circuits like <a href="/facts/Wireless_modem/91kNTutm">wireless modems</a> and I/O controllers in a sealed integrated package. It was announced on September 9, 2014, as part of the "Wish we could say more" event. It was used in the first-generation <a href="/facts/Apple_Watch/tJjbXQEa">Apple Watch</a>.<a class="footnote-ref" id="fnref:315" href="#fn:315"><sup>315</sup></a> </p> <h4>Apple S1P</h4> <p>Used in <a href="/facts/Apple_Watch_Series_1/VJpt6gaX">Apple Watch Series 1</a>. It has a dual-core processor identical to the S2, with the exception of the built-in <a href="/facts/GPS_receiver/MmeJ3XWK">GPS receiver</a>. It contains the same dual-core CPU with the same new <a href="/facts/GPU/PTK1RQVp">GPU</a> capabilities as the S2, making it about 50% faster than the S1.<a class="footnote-ref" id="fnref:316" href="#fn:316"><sup>316</sup></a><a class="footnote-ref" id="fnref:317" href="#fn:317"><sup>317</sup></a> </p> <h3>Apple S2</h3> <p class="note">Main article: <a href="/facts/Apple_S2/mRGnWK9f">Apple S2</a></p> <p>Used in the <a href="/facts/Apple_Watch_Series_2/VJpt6gaX">Apple Watch Series 2</a>. It has a dual-core processor and a built-in GPS receiver. The S2's two cores deliver 50% higher performance and the GPU delivers twice as much as the predecessor,<a class="footnote-ref" id="fnref:318" href="#fn:318"><sup>318</sup></a> and is similar in performance to the Apple S1P.<a class="footnote-ref" id="fnref:319" href="#fn:319"><sup>319</sup></a> </p> <h3>Apple S3</h3> <p>Used in the <a href="/facts/Apple_Watch_Series_3/yv0P9s5U">Apple Watch Series 3</a>. It has a dual-core processor that is 70% faster than the Apple S2 and a built-in GPS receiver.<a class="footnote-ref" id="fnref:320" href="#fn:320"><sup>320</sup></a> There is also an option for a cellular modem and an internal <a href="/facts/ESIM/kT6oTDWK">eSIM</a> module.<a class="footnote-ref" id="fnref:321" href="#fn:321"><sup>321</sup></a> It also includes the W2 chip.<a class="footnote-ref" id="fnref:322" href="#fn:322"><sup>322</sup></a> The S3 also contains a <a href="/facts/Barometric/M8VQc69q">barometric</a> <a href="/facts/Altimeter/dHEXhjQK">altimeter</a>, the <a href="/facts/Apple_W2/A8RgouDB">W2</a> wireless connectivity processor, and in some models <a href="/facts/UMTS/lhy2RrMw">UMTS</a> (3G) and <a href="/facts/LTE_(telecommunication)/72QhwXHT">LTE</a> (4G) cellular modems served by a built-in <a href="/facts/ESIM/kT6oTDWK">eSIM</a>.<a class="footnote-ref" id="fnref:323" href="#fn:323"><sup>323</sup></a> </p> <h3>Apple S4</h3> <p>Used in the <a href="/facts/Apple_Watch_Series_4/p0UIoSf9">Apple Watch Series 4</a>. It introduced 64-bit <a href="/facts/ARMv8/SALsYA79">ARMv8</a> <a href="/facts/Microprocessor_core/ABNb65hQ">cores</a> to the Apple Watch through two Tempest cores,<a class="footnote-ref" id="fnref:324" href="#fn:324"><sup>324</sup></a><a class="footnote-ref" id="fnref:325" href="#fn:325"><sup>325</sup></a> which are also found in the <a href="/facts/Apple_A12/gNpjauR6">A12</a> as energy-efficient cores. Despite its small size, Tempest uses a 3-wide decode <a href="/facts/Out-of-order_execution/bM0dQM8m">out-of-order</a> <a href="/facts/Superscalar_processor/gPxRAb25">superscalar</a> design, which makes it much more powerful than preceding in-order cores. </p><p>The S4 contains a Neural Engine that is able to run <a href="/facts/Core_ML/jjEcdM3E">Core ML</a>.<a class="footnote-ref" id="fnref:326" href="#fn:326"><sup>326</sup></a> Third-party apps can use it starting from watchOS 6. The SiP also includes new accelerometer and gyroscope functionality that has twice the dynamic range in measurable values of its predecessor, as well as being able to sample data at 8 times the speed.<a class="footnote-ref" id="fnref:327" href="#fn:327"><sup>327</sup></a> It contains the W3 wireless chip, which supports <a href="/facts/Bluetooth_5/sWAjpMrj">Bluetooth 5</a>. It also contains a new custom <a href="/facts/GPU/PTK1RQVp">GPU</a>, which can use the <a href="/facts/Metal_(API)/DIbAxKF6">Metal API</a>.<a class="footnote-ref" id="fnref:328" href="#fn:328"><sup>328</sup></a> </p> <h3>Apple S5</h3> <p>Used in the <a href="/facts/Apple_Watch_Series_5/c0gYh0A5">Apple Watch Series 5</a>, <a href="/facts/Apple_Watch_SE/acn0BJhF">Watch SE</a>, and <a href="/facts/HomePod_mini/jgGHgVxA">HomePod mini</a>.<a class="footnote-ref" id="fnref:329" href="#fn:329"><sup>329</sup></a> It adds a built-in <a href="/facts/Magnetometer/dqX9g1og">magnetometer</a> to the custom 64-bit dual-core processor and GPU of the S4.<a class="footnote-ref" id="fnref:330" href="#fn:330"><sup>330</sup></a> </p> <h3>Apple S6</h3> <p>Used in the <a href="/facts/Apple_Watch_Series_6/TkByPAbt">Apple Watch Series 6</a>. It has a custom 64-bit dual-core processor that runs up to 20 percent faster than the S5.<a class="footnote-ref" id="fnref:331" href="#fn:331"><sup>331</sup></a><a class="footnote-ref" id="fnref:332" href="#fn:332"><sup>332</sup></a> The dual-cores in the S6 are based on the <a href="/facts/Apple_A13/2h3wVEU1">A13 Bionic's</a> energy-efficient "<a href="/facts/ARM_big.LITTLE/YIWq2bWY">little</a>" Thunder cores at 1.8 GHz.<a class="footnote-ref" id="fnref:333" href="#fn:333"><sup>333</sup></a> Like the S4 and S5, it also contains the W3 wireless chip.<a class="footnote-ref" id="fnref:334" href="#fn:334"><sup>334</sup></a> The S6 adds the new U1 ultrawide band chip, an always-on <a href="/facts/Altimeter/dHEXhjQK">altimeter</a>, and 5 GHz <a href="/facts/WiFi/u94quCsx">WiFi</a>.<a class="footnote-ref" id="fnref:335" href="#fn:335"><sup>335</sup></a><a class="footnote-ref" id="fnref:336" href="#fn:336"><sup>336</sup></a> </p> <h3>Apple S7</h3> <p>Used in the <a href="/facts/Apple_Watch_Series_7/tJjbXQEa">Apple Watch Series 7</a> and second-generation <a href="/facts/HomePod/ToJVXQMc">HomePod</a>. The S7 CPU has the same T8301 identifier and quoted performance as the S6. It is the second time utilizing the energy-efficient "<a href="/facts/ARM_big.LITTLE/YIWq2bWY">little</a>" Thunder cores of the <a href="/facts/Apple_A13/2h3wVEU1">A13 Bionic</a>.<a class="footnote-ref" id="fnref:337" href="#fn:337"><sup>337</sup></a> </p> <h3>Apple S8</h3> <p>Used in the Apple Watch SE (2nd generation), Watch Series 8, and Watch Ultra.<a class="footnote-ref" id="fnref:338" href="#fn:338"><sup>338</sup></a> The S8 CPU has the same T8301 identifier and quoted performance as the S6 and S7. It is the final CPU to utilize the energy-efficient "<a href="/facts/ARM_big.LITTLE/YIWq2bWY">little</a>" Thunder cores of the <a href="/facts/Apple_A13/2h3wVEU1">A13 Bionic</a>.<a class="footnote-ref" id="fnref:339" href="#fn:339"><sup>339</sup></a> </p> <h3>Apple S9</h3> <p>Used in the Apple Watch Series 9 and Watch Ultra 2. The S9 CPU has a new dual-core CPU with 60 percent more transistors than the S8, a new four-core Neural Engine and the new U2 ultra-wide band chip. The dual-cores in the S9 are based on the <a href="/facts/Apple_A16/MCduVutl">A16 Bionic's</a> energy efficient "<a href="/facts/ARM_big.LITTLE/YIWq2bWY">little</a>" Sawtooth cores.<a class="footnote-ref" id="fnref:340" href="#fn:340"><sup>340</sup></a> </p> <h3>Apple S10</h3> <p>Used in the Apple Watch Series 10. The S10 CPU is the second time utilizing the energy-efficient "<a href="/facts/ARM_big.LITTLE/YIWq2bWY">little</a>" Sawtooth cores of the <a href="/facts/Apple_A16/MCduVutl">A16 Bionic</a>. </p> <h3>Comparison of <i>S</i>-series processors</h3> <table><tbody><tr><th>Name</th><th>Model no.</th><th>Image</th><th><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th><a href="/facts/Die_(integrated_circuit)/XWvdlltE">Die size</a></th><th>CPU <a href="/facts/Instruction_set/8p8vwUeE">ISA</a></th><th><a href="/facts/CPU/Jxp1bqMV">CPU</a></th><th><a href="/facts/CPU_cache/x8BYFcdv">CPU cache</a></th><th><a href="/facts/Graphics_processing_unit/PTK1RQVp">GPU</a></th><th><a href="/facts/Mobile_DDR/2XdLrg47">Memory technology</a></th><th><a href="/facts/Modem/9H0Xwtq0">Modem</a></th><th>First release</th></tr><tr><th><a href="/facts/Apple_S1/X3fllftV">S1</a></th><td>APL0778<a class="footnote-ref" id="fnref:341" href="#fn:341"><sup>341</sup></a></td><td></td><td>28 nm <a href="/facts/High-%25CE%25BA_dielectric/4E8qtXmp">Hκ</a> <a href="/facts/Metal_gate/vFzyEhb4">MG</a><a class="footnote-ref" id="fnref:342" href="#fn:342"><sup>342</sup></a><a class="footnote-ref" id="fnref:343" href="#fn:343"><sup>343</sup></a></td><td>32 mm2<a class="footnote-ref" id="fnref:344" href="#fn:344"><sup>344</sup></a></td><td><a href="/facts/ARMv7/SALsYA79">ARMv7k</a><a class="footnote-ref" id="fnref:345" href="#fn:345"><sup>345</sup></a><a class="footnote-ref" id="fnref:346" href="#fn:346"><sup>346</sup></a></td><td>520 MHz <a href="/facts/Single-core/ErrHPffJ">single-core</a> <a href="/facts/ARM_Cortex-A7/Ch36KljD">Cortex-A7</a><a class="footnote-ref" id="fnref:347" href="#fn:347"><sup>347</sup></a></td><td><a href="/facts/CPU_cache/x8BYFcdv">L1d</a>: 32 KB<a class="footnote-ref" id="fnref:348" href="#fn:348"><sup>348</sup></a><a href="/facts/CPU_cache/x8BYFcdv">L2</a>: 256 KB<a class="footnote-ref" id="fnref:349" href="#fn:349"><sup>349</sup></a></td><td><a href="/facts/PowerVR/lTtwow8j">PowerVR Series 5</a><a class="footnote-ref" id="fnref:350" href="#fn:350"><sup>350</sup></a><a class="footnote-ref" id="fnref:351" href="#fn:351"><sup>351</sup></a></td><td><a href="/facts/LPDDR3/2XdLrg47">LPDDR3</a><a class="footnote-ref" id="fnref:352" href="#fn:352"><sup>352</sup></a></td><td></td><td>April 24, 2015</td></tr><tr><th><a href="/facts/Apple_S1P/X3fllftV">S1P</a></th><td rowspan="10">TBC</td><td></td><td colspan="2" rowspan="3">TBC</td><td rowspan="2">ARMv7k<a class="footnote-ref" id="fnref:353" href="#fn:353"><sup>353</sup></a><a class="footnote-ref" id="fnref:354" href="#fn:354"><sup>354</sup></a><a class="footnote-ref" id="fnref:355" href="#fn:355"><sup>355</sup></a></td><td rowspan="2">520 MHz <a href="/facts/Multi-core_processor/ABNb65hQ">dual-core</a> <a href="/facts/ARM_Cortex-A7/Ch36KljD">Cortex-A7</a><a class="footnote-ref" id="fnref:356" href="#fn:356"><sup>356</sup></a></td><td rowspan="2"><a href="/facts/CPU_cache/x8BYFcdv">L1d</a>: 32 KB<a class="footnote-ref" id="fnref:357" href="#fn:357"><sup>357</sup></a></td><td rowspan="2"><a href="/facts/PowerVR/lTtwow8j">PowerVR Series 6 'Rogue'</a><a class="footnote-ref" id="fnref:358" href="#fn:358"><sup>358</sup></a></td><td rowspan="2">LPDDR3</td><td></td><td rowspan="2">September 12, 2016</td></tr><tr><th><a href="/facts/Apple_S2/mRGnWK9f">S2</a></th><td></td><td></td></tr><tr><th>S3</th><td></td><td>ARMv7k<a class="footnote-ref" id="fnref:359" href="#fn:359"><sup>359</sup></a></td><td><a href="/facts/Multi-core_processor/ABNb65hQ">Dual-core</a></td><td colspan="2">TBC</td><td>LPDDR4</td><td>Qualcomm MDM9635MSnapdragon X7 LTE</td><td>September 22, 2017</td></tr><tr><th>S4</th><td></td><td rowspan="2">7 nm (TSMC N7)</td><td rowspan="2">TBC</td><td rowspan="2"><a href="/facts/ARMv8/SALsYA79">ARMv8</a>.3-A ILP32<a class="footnote-ref" id="fnref:360" href="#fn:360"><sup>360</sup></a><a class="footnote-ref" id="fnref:361" href="#fn:361"><sup>361</sup></a><a class="footnote-ref" id="fnref:362" href="#fn:362"><sup>362</sup></a></td><td rowspan="2">1.59 GHz <a href="/facts/Multi-core_processor/ABNb65hQ">Dual-core</a> Tempest</td><td rowspan="2"><a href="/facts/CPU_cache/x8BYFcdv">L1d</a>: 32 KB<a class="footnote-ref" id="fnref:363" href="#fn:363"><sup>363</sup></a><a href="/facts/CPU_cache/x8BYFcdv">L2</a>: 2 MB<a class="footnote-ref" id="fnref:364" href="#fn:364"><sup>364</sup></a></td><td rowspan="2">Apple G11M<a class="footnote-ref" id="fnref:365" href="#fn:365"><sup>365</sup></a></td><td colspan="2" rowspan="2">TBC</td><td>September 21, 2018</td></tr><tr><th>S5</th><td></td><td>September 20, 2019</td></tr><tr><th>S6</th><td></td><td rowspan="3">7 nm (TSMC N7P)</td><td colspan="2" rowspan="5">TBC</td><td rowspan="3">1.8 GHz <a href="/facts/Multi-core_processor/ABNb65hQ">Dual-core</a> Thunder</td><td rowspan="3"><a href="/facts/CPU_cache/x8BYFcdv">L1d</a>: 48 KB<a class="footnote-ref" id="fnref:366" href="#fn:366"><sup>366</sup></a><a href="/facts/CPU_cache/x8BYFcdv">L2</a>: 4 MB<a class="footnote-ref" id="fnref:367" href="#fn:367"><sup>367</sup></a></td><td colspan="3" rowspan="5">TBC</td><td>September 18, 2020</td></tr><tr><th>S7</th><td></td><td>October 15, 2021</td></tr><tr><th>S8</th><td></td><td>September 16, 2022</td></tr><tr><th>S9</th><td></td><td rowspan="2">4 nm (TSMC N4P)<a class="footnote-ref" id="fnref:368" href="#fn:368"><sup>368</sup></a></td><td rowspan="2"><a href="/facts/Multi-core_processor/ABNb65hQ">Dual-core</a> Sawtooth</td><td rowspan="2"><a href="/facts/CPU_cache/x8BYFcdv">L1d</a>: 64 KB<a href="/facts/CPU_cache/x8BYFcdv">L2</a>: 4 MB<a class="footnote-ref" id="fnref:369" href="#fn:369"><sup>369</sup></a></td><td>September 22, 2023</td></tr><tr><th>S10</th><td></td><td>September 20, 2024</td></tr></tbody></table> <h2 id="secure-enclaves">Secure Enclaves</h2> <p>The <i>T</i> series operates as a secure enclave on Intel-based MacBook and iMac computers released from 2016 onwards. The chip processes and encrypts <a href="/facts/Biometrics/MgTbyA0r">biometric</a> information (<a href="/facts/Touch_ID/dJKF0Fwz">Touch ID</a>) and acts as a gatekeeper to the microphone and FaceTime HD camera, protecting them from hacking. The chip runs bridgeOS, a purported variant of <a href="/facts/WatchOS/zH1fkn2R">watchOS</a>.<a class="footnote-ref" id="fnref:370" href="#fn:370"><sup>370</sup></a> The functions of the <i>T</i>-series processor were built into the <i>M</i>-series CPUs, thus ending the need for the <i>T</i> series. </p> <h3>Apple T1</h3> <p>The Apple T1 chip is an <a href="/facts/ARMv7/SALsYA79">ARMv7</a> SoC (derived from the processor in the Apple Watch's <a href="/facts/Apple_S2/mRGnWK9f">S2</a>) that drives the System Management Controller (SMC) and <a href="/facts/Touch_ID/dJKF0Fwz">Touch ID</a> sensor of the <a href="/facts/MacBook_Pro/d1DuazCK">2016 and 2017 MacBook Pro with Touch Bar</a>.<a class="footnote-ref" id="fnref:371" href="#fn:371"><sup>371</sup></a> </p> <h3>Apple T2</h3> <p class="note">Main article: <a href="/facts/Apple_T2/A8RgouDB">Apple T2</a></p> <p>The Apple T2 security chip is a SoC first released in the <a href="/facts/IMac_Pro/rTYNzpnn">iMac Pro</a>. It is a 64-bit ARMv8 chip (a variant of the <a href="/facts/Apple_A10/HVRIKloF">A10 Fusion</a>, or T8010).<a class="footnote-ref" id="fnref:372" href="#fn:372"><sup>372</sup></a> It provides a secure enclave for encrypted keys, enables users to lock down the computer's boot process, handles system functions like the camera and audio control, and handles on-the-fly encryption and decryption for the <a href="/facts/Solid-state_drive/aMHBy8gU">solid-state drive</a>.<a class="footnote-ref" id="fnref:373" href="#fn:373"><sup>373</sup></a><a class="footnote-ref" id="fnref:374" href="#fn:374"><sup>374</sup></a><a class="footnote-ref" id="fnref:375" href="#fn:375"><sup>375</sup></a> T2 also delivers "enhanced imaging processing" for the iMac Pro's <a href="/facts/FaceTime/EBzVmbfe">FaceTime</a> HD camera.<a class="footnote-ref" id="fnref:376" href="#fn:376"><sup>376</sup></a><a class="footnote-ref" id="fnref:377" href="#fn:377"><sup>377</sup></a> </p> <h3>Comparison of <i>T</i>-series processors</h3> <table><tbody><tr><th rowspan="2">Name</th><th rowspan="2">Model no.</th><th rowspan="2">Image</th><th rowspan="2"><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th rowspan="2"><a href="/facts/Die_(integrated_circuit)/XWvdlltE">Die size</a></th><th rowspan="2">CPU <a href="/facts/Instruction_set/8p8vwUeE">ISA</a></th><th rowspan="2"><a href="/facts/CPU/Jxp1bqMV">CPU</a></th><th rowspan="2"><a href="/facts/CPU_cache/x8BYFcdv">CPU cache</a></th><th rowspan="2"><a href="/facts/Graphics_processing_unit/PTK1RQVp">GPU</a></th><th><a href="/facts/Mobile_DDR/2XdLrg47">Memory technology</a></th><th rowspan="2">First release</th></tr><tr><th><a href="/facts/Memory_bandwidth/zE5JRtRl">Memory bandwidth</a></th></tr><tr><th><a href="/facts/Apple_T1/A8RgouDB">T1</a></th><td>APL1023<a class="footnote-ref" id="fnref:378" href="#fn:378"><sup>378</sup></a></td><td></td><td>TBC</td><td>TBC</td><td>ARMv7</td><td></td><td></td><td>TBD</td><td></td><td>November12, 2016</td></tr><tr><th><a href="/facts/Apple_T2/A8RgouDB">T2</a></th><td>APL1027<a class="footnote-ref" id="fnref:379" href="#fn:379"><sup>379</sup></a></td><td></td><td>TSMC 16 nm FinFET.<a class="footnote-ref" id="fnref:380" href="#fn:380"><sup>380</sup></a></td><td>104 mm2<a class="footnote-ref" id="fnref:381" href="#fn:381"><sup>381</sup></a></td><td>ARMv8-AARMv7-A</td><td>2× Hurricane2× Zephyr+ Cortex-A7</td><td>L1i: 64 KBL1d: 64 KBL2: 3 MB<a class="footnote-ref" id="fnref:382" href="#fn:382"><sup>382</sup></a></td><td>3× cores<a class="footnote-ref" id="fnref:383" href="#fn:383"><sup>383</sup></a></td><td>LP-DDR4<a class="footnote-ref" id="fnref:384" href="#fn:384"><sup>384</sup></a></td><td>December14, 2017</td></tr></tbody></table> <h2 id="cellular-modems">Cellular Modems</h2> <p>The Apple <i>C</i> series is a family of cellular modem chips. </p> <h3>Apple C1</h3> <p>Apple C1 is a cellular modem chip introduced in the <a href="/facts/IPhone_16e/7hMrLCyf">iPhone 16e</a>.<a class="footnote-ref" id="fnref:385" href="#fn:385"><sup>385</sup></a> It is built on the N4 process node by TSMC.<a class="footnote-ref" id="fnref:386" href="#fn:386"><sup>386</sup></a> It supports UMTS/<a href="/facts/High_Speed_Packet_Access/4S6Mz83J">HSPA</a>+ and 5G (sub-6 GHz), but lacks <a href="/facts/Evolved_High_Speed_Packet_Access/InItt9s0">DC-HSDPA</a> and <a href="/facts/Extremely_high_frequency/l28Grdmp">mmWave</a>, which are supported by other iPhone 16 models. Apple claims that the C1 is more power efficient than previous iPhone modems and consumes 20–25% less power than the Qualcomm modems used in other iPhone 16 models.<a class="footnote-ref" id="fnref:387" href="#fn:387"><sup>387</sup></a><a class="footnote-ref" id="fnref:388" href="#fn:388"><sup>388</sup></a> </p> <h2 id="ultra-wideband">Ultra-Wideband</h2> <p>The Apple <i>U</i> series is a family of <a href="/facts/System_in_package/Tqdpp6hq">systems in a package (SiP)</a> implementing <a href="/facts/Ultra-wideband/TQ4k9z8g">ultra-wideband</a> (UWB) radio. </p> <h3>Apple U1</h3> <p>The Apple U1 is used in the <a href="/facts/IPhone_11/flAF4pfX">iPhone 11</a> series through the <a href="/facts/IPhone_14/HHCmlwEJ">iPhone 14</a> series (excluding the <a href="/facts/IPhone_SE_(2nd_generation)/e64YK2wI">second</a> and <a href="/facts/IPhone_SE_(3rd_generation)/6tnKJVr1">third</a> generation iPhone SE); <a href="/facts/Apple_Watch/tJjbXQEa">Apple Watch</a> Series 6 through the Apple Watch Series 8 and Apple Watch Ultra (1st generation); <a href="/facts/HomePod/ToJVXQMc">HomePod</a> (2nd generation) and <a href="/facts/HomePod_Mini/jgGHgVxA">HomePod Mini</a>; <a href="/facts/AirTag_(tracker)/0M4w3KxY">AirTag</a> trackers; and the charging case for <a href="/facts/AirPods_Pro/jdtxJqVW">AirPods Pro</a> (2nd generation).<a class="footnote-ref" id="fnref:389" href="#fn:389"><sup>389</sup></a> </p> <h3>Apple U2</h3> <p>The Apple U2 (referred to by Apple as its "Second-generation Ultra Wideband chip") is used in the <a href="/facts/IPhone_15/1Lo1A2ct">iPhone 15</a> series, <a href="/facts/IPhone_16/4lpYouD7">iPhone 16</a> series (excluding <a href="/facts/IPhone_16e/7hMrLCyf">iPhone 16e</a>), <a href="/facts/Apple_Watch_Series_9/tJjbXQEa">Apple Watch Series 9</a>, <a href="/facts/Apple_Watch_Ultra_2/tJjbXQEa">Apple Watch Ultra 2</a> and <a href="/facts/Apple_Watch_Series_10/tJjbXQEa">Apple Watch Series 10</a>. </p> <h3>Comparison of <i>U</i>-series processors</h3> <table><tbody><tr><th>Name</th><th>Model no.</th><th>Image</th><th>CPU</th><th><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th>First release</th></tr><tr><th>U1</th><td>TMK<p>A75<a class="footnote-ref" id="fnref:390" href="#fn:390"><sup>390</sup></a></p></td><td></td><td><a href="/facts/ARM_Cortex-M/prW99nkV">Cortex-M4ARMv7E-M</a><a class="footnote-ref" id="fnref:391" href="#fn:391"><sup>391</sup></a></td><td>16 nm <a href="/facts/FinFET/xox63kP7">FinFET</a>(<a href="/facts/TSMC/B4BdojRk">TSMC</a> 16FF)</td><td>September 20, 2019</td></tr><tr><th>U2</th><td></td><td></td><td></td><td></td><td>September 22, 2023</td></tr></tbody></table> <h2 id="connectivity-bluetoothwi-fi">Connectivity (Bluetooth/Wi-Fi)</h2> <p>The Apple <i>W</i> series, starting with the W2, are a family of <a href="/facts/Radio_frequency/aWku7h4R">RF</a> <a href="/facts/System_on_a_chip/1RVvVe6N">SoCs</a> used for Bluetooth and Wi-Fi connectivity. </p> <h3>Apple W2</h3> <p>The Apple W2, used in the <a href="/facts/Apple_Watch_Series_3/yv0P9s5U">Apple Watch Series 3</a>, is integrated into the <a href="/facts/Apple_S3/vqP7FluR">Apple S3</a> SiP. Apple claimed the chip makes Wi-Fi 85% faster and allows Bluetooth and Wi-Fi to use half the power of the W1 implementation.<a class="footnote-ref" id="fnref:392" href="#fn:392"><sup>392</sup></a> </p> <h3>Apple W3</h3> <p>The Apple W3 is used in the <a href="/facts/Apple_Watch_Series_4/p0UIoSf9">Apple Watch Series 4</a>,<a class="footnote-ref" id="fnref:393" href="#fn:393"><sup>393</sup></a> <a href="/facts/Apple_Watch_Series_5/c0gYh0A5">Series 5</a>,<a class="footnote-ref" id="fnref:394" href="#fn:394"><sup>394</sup></a> <a href="/facts/Apple_Watch_Series_6/TkByPAbt">Series 6</a>,<a class="footnote-ref" id="fnref:395" href="#fn:395"><sup>395</sup></a> <a href="/facts/Apple_Watch_SE/acn0BJhF">SE (1st generation)</a>,<a class="footnote-ref" id="fnref:396" href="#fn:396"><sup>396</sup></a> <a href="/facts/Apple_Watch_Series_7/tJjbXQEa">Series 7</a>, <a href="/facts/Apple_Watch_Series_8/tJjbXQEa">Series 8</a>, <a href="/facts/Apple_Watch_SE/acn0BJhF">SE (2nd generation)</a>, <a href="/facts/Apple_Watch_Ultra/dIDIRdob">Ultra</a>, <a href="/facts/Apple_Watch_Series_9/tJjbXQEa">Series 9</a>, <a href="/facts/Apple_Watch_Ultra_2/tJjbXQEa">Ultra 2</a>, and <a href="/facts/Apple_Watch_Series_10/tJjbXQEa">Series 10</a>. It is integrated into the <a href="/facts/Apple_S4/CLj1YWHe">Apple S4</a>, <a href="/facts/Apple_S5/A8RgouDB">S5</a>, <a href="/facts/Apple_S6/A8RgouDB">S6</a>, <a href="/facts/Apple_S7/A8RgouDB">S7</a>, <a href="/facts/Apple_S8/A8RgouDB">S8</a>, S9, and <a href="/facts/Apple_Silicon/A8RgouDB">S10</a> SiPs. It supports Bluetooth 5.0/5.3. </p> <h3>Comparison of <i>W</i>-series processors</h3> <table><tbody><tr><th rowspan="2">Name</th><th rowspan="2">Model no.</th><th rowspan="2">Image</th><th rowspan="2"><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th rowspan="2"><a href="/facts/Die_(integrated_circuit)/XWvdlltE">Die size</a></th><th rowspan="2">Bluetooth certification</th><th rowspan="2">First release</th></tr><tr><th>W2</th><td>338S00348<a class="footnote-ref" id="fnref:397" href="#fn:397"><sup>397</sup></a></td><td></td><td colspan="2" rowspan="2">TBC</td><td>4.2</td><td>September22, 2017</td></tr><tr><th>W3</th><td>338S00464<a class="footnote-ref" id="fnref:398" href="#fn:398"><sup>398</sup></a></td><td></td><td>5.0/5.3</td><td>September21, 2018</td></tr></tbody></table> <h2 id="bluetooth-audio">Bluetooth Audio</h2> <p>The Apple <i>W1</i> and the <i>H</i> series are a family of <a href="/facts/System_on_a_chip/1RVvVe6N">SoCs</a> with <a href="/facts/Bluetooth/sWAjpMrj">Bluetooth</a> wireless connectivity and low-power audio processing for use in headphones and speakers. </p> <h3>Apple W1</h3> <p>The Apple W1 is a SoC used in the 2016 <a href="/facts/AirPods/1Dp8TnEx">AirPods</a> and select <a href="/facts/Beats_Electronics/CJTdsweQ">Beats headphones</a>.<a class="footnote-ref" id="fnref:399" href="#fn:399"><sup>399</sup></a><a class="footnote-ref" id="fnref:400" href="#fn:400"><sup>400</sup></a> It maintains a Bluetooth<a class="footnote-ref" id="fnref:401" href="#fn:401"><sup>401</sup></a> <a href="/facts/Bluetooth/sWAjpMrj">Class 1</a> connection with a computer device and decodes the audio stream that is sent to it.<a class="footnote-ref" id="fnref:402" href="#fn:402"><sup>402</sup></a> Its die size is 14.3 mm2.<a class="footnote-ref" id="fnref:403" href="#fn:403"><sup>403</sup></a> </p> <h3>Apple H1</h3> <p>The Apple H1 chip was used in the second and third generation <a href="/facts/AirPods/1Dp8TnEx">AirPods</a> and the first generation <a href="/facts/AirPods_Pro/jdtxJqVW">AirPods Pro</a>. It was also used in the Powerbeats Pro, the Beats Solo Pro, Beats Fit Pro, the 2020 Powerbeats, and <a href="/facts/AirPods_Max/pLRem9d1">AirPods Max</a>.<a class="footnote-ref" id="fnref:404" href="#fn:404"><sup>404</sup></a> Specifically designed for headphones, it has Bluetooth 5.0, supports hands-free "Hey Siri" commands,<a class="footnote-ref" id="fnref:405" href="#fn:405"><sup>405</sup></a> and offers 30 percent lower <a href="/facts/Latency_(audio)/AtwyGGTU">latency</a> than the W1 chip used in earlier AirPods.<a class="footnote-ref" id="fnref:406" href="#fn:406"><sup>406</sup></a> </p> <h3>Apple H2</h3> <p>The Apple H2 chip was used in the fourth generation AirPods and second generation AirPods Pro. It has Bluetooth 5.3, and implements 48 kHz <a href="/facts/Noise_reduction/9jrDQnAN">noise reduction</a> in hardware. The 2022 version of the H2 operates only on the 2.4 GHz frequency, while the 2023 version adds support for audio transmission using a proprietary protocol in two specific frequency ranges of the 5 GHz band.<a class="footnote-ref" id="fnref:407" href="#fn:407"><sup>407</sup></a> </p> <h3>Comparison of Bluetooth audio processors</h3> <table><tbody><tr><th>Name</th><th>Model no.</th><th>Image</th><th>Bluetooth certification</th><th>First release</th></tr><tr><th>W1</th><td>343S00130<a class="footnote-ref" id="fnref:408" href="#fn:408"><sup>408</sup></a>343S00131<a class="footnote-ref" id="fnref:409" href="#fn:409"><sup>409</sup></a></td><td></td><td>4.2</td><td>December13, 2016</td></tr><tr><th>H1</th><td>343S00289<a class="footnote-ref" id="fnref:410" href="#fn:410"><sup>410</sup></a>(AirPods 2nd Generation)343S00290<a class="footnote-ref" id="fnref:411" href="#fn:411"><sup>411</sup></a>(AirPods 3rd Generation)343S00404<a class="footnote-ref" id="fnref:412" href="#fn:412"><sup>412</sup></a>(AirPods Max)H1 SiP<a class="footnote-ref" id="fnref:413" href="#fn:413"><sup>413</sup></a>(AirPods Pro)</td><td> </td><td>5.0</td><td>March 20, 2019</td></tr><tr><th>H2</th><td>AirPods (4th generation)AirPods Pro (2nd generation)<a class="footnote-ref" id="fnref:414" href="#fn:414"><sup>414</sup></a>Apple Vision Pro</td><td></td><td>5.3</td><td>September 7, 2022</td></tr></tbody></table> <h2 id="motion-coprocessors">Motion Coprocessors</h2> <p class="note">Further information: <a href="/facts/Apple_motion_coprocessors/GKLPF78J">Apple motion coprocessors</a></p> <p>The Apple <i>M</i>-series coprocessors are motion coprocessors used by Apple Inc. in their mobile devices. First released in 2013, their function is to collect sensor data from integrated accelerometers, gyroscopes and compasses and offload the collecting and processing of sensor data from the main central processing unit (CPU). </p><p>Only the M7 and M8 coprocessors were housed on separate chips; the M9, M10, and M11 coprocessors were embedded in their corresponding A-series chips. Beginning with the A12 Bionic chip in 2018, the motion coprocessors were fully integrated into the SoC. Apple eventually reused the <i>M</i>-series codename for their desktop SoCs. </p> <h3>Comparison of <i>M</i>-series coprocessors</h3> <table><tbody><tr><th>Name</th><th>Model no.</th><th>Image</th><th><a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">Semiconductor technology</a></th><th>CPU <a href="/facts/Instruction_set/8p8vwUeE">ISA</a></th><th><a href="/facts/CPU/Jxp1bqMV">CPU</a></th><th>First release</th></tr><tr><th>Apple M7</th><td>LPC18A1</td><td></td><td rowspan="2">90 nm</td><td rowspan="2"><a href="/facts/ARMv7/SALsYA79">ARMv7</a>-M</td><td rowspan="2">150 MHz <a href="/facts/ARM_Cortex-M3/prW99nkV">Cortex-M3</a></td><td>September10, 2013</td></tr><tr><th>Apple M8</th><td>LPC18B1</td><td></td><td>September9, 2014</td></tr></tbody></table> <h2 id="miscellaneous-devices">Miscellaneous devices</h2> <p>This segment is about Apple-designed processors that are not easily sorted into another section. </p> <h3>Early series</h3> <p class="note">See also: <a href="/facts/Early_iPhone_systems-on-chip/vejdBUaF">Early iPhone systems-on-chip</a></p> <p>Apple first used <a href="/facts/Samsung/oNXUwDjn">Samsung</a>-developed SoCs in early versions of the <a href="/facts/IPhone/h5WeKRl9">iPhone</a> and <a href="/facts/IPod_Touch/PRJabx51">iPod Touch</a>. They combine in one package a single <a href="/facts/ARM_architecture/SALsYA79">ARM-based</a> processing core (<a href="/facts/CPU/Jxp1bqMV">CPU</a>), a graphics processing unit (<a href="/facts/GPU/PTK1RQVp">GPU</a>), and other electronics necessary for mobile computing. </p><p>The APL0098 (also 8900B<a class="footnote-ref" id="fnref:415" href="#fn:415"><sup>415</sup></a> or S5L8900) is a <a href="/facts/Package_on_package/HGIeIDVl">package on package</a> (PoP) system on a chip (SoC) that was introduced on June 29, 2007, at the launch of the <a href="/facts/IPhone_(1st_generation)/xwVatAHK">original iPhone</a>. It includes a 412 MHz single-core <a href="/facts/ARM11/RBYoh2hU">ARM11</a> CPU and a PowerVR MBX Lite GPU. It was manufactured by Samsung on a <a href="/facts/90_nm/mmjMro9E">90 nm</a> <a href="/facts/Semiconductor_device_fabrication/Jd23Mu1z">process</a>.<a class="footnote-ref" id="fnref:416" href="#fn:416"><sup>416</sup></a> The <a href="/facts/IPhone_3G/SRS78a4T">iPhone 3G</a> and the first-generation iPod Touch also use it.<a class="footnote-ref" id="fnref:417" href="#fn:417"><sup>417</sup></a> </p><p>The APL0278<a class="footnote-ref" id="fnref:418" href="#fn:418"><sup>418</sup></a> (also S5L8720) is a PoP SoC introduced on September 9, 2008, at the launch of the <a href="/facts/IPod_Touch_(2nd_generation)/PRJabx51">second-generation iPod Touch</a>. It includes a 533 MHz single-core ARM11 CPU and a <a href="/facts/PowerVR/lTtwow8j">PowerVR</a> MBX Lite GPU. It was manufactured by Samsung on a <a href="/facts/65_nm/yqoIVRgR">65 nm</a> process.<a class="footnote-ref" id="fnref:419" href="#fn:419"><sup>419</sup></a><a class="footnote-ref" id="fnref:420" href="#fn:420"><sup>420</sup></a> </p><p>The APL0298 (also S5L8920) is a PoP SoC introduced on June 8, 2009, at the launch of the <a href="/facts/IPhone_3GS/Joy8L6r7">iPhone 3GS</a>. It includes a 600 MHz single-core <a href="/facts/ARM_Cortex-A8/vM6beXwg">Cortex-A8</a> CPU and a PowerVR SGX535 GPU. It was manufactured by Samsung on a 65 nm process.<a class="footnote-ref" id="fnref:421" href="#fn:421"><sup>421</sup></a> </p><p>The APL2298 (also S5L8922) is a <a href="/facts/45_nm/hlbmxAme">45 nm</a> <a href="/facts/Die_shrink/fgJ8nL4b">die shrunk</a> version of the iPhone 3GS SoC<a class="footnote-ref" id="fnref:422" href="#fn:422"><sup>422</sup></a> and was introduced on September 9, 2009, at the launch of the <a href="/facts/IPod_Touch_(3rd_generation)/PRJabx51">third-generation iPod Touch</a>. </p> <h3>Other</h3> <p>The Samsung S5L8747 is an ARM-based <a href="/facts/Microcontroller/MKrnAhnm">microcontroller</a> used in Apple's <i>Lightning Digital AV Adapter</i>, a <a href="/facts/Lightning_(connector)/zYvT8Yap">Lightning</a>-to-<a href="/facts/HDMI/HuNwzm04">HDMI</a> adapter. This is a miniature computer with 256 MB RAM, running an <a href="/facts/XNU/dUCpExf0">XNU</a> kernel loaded from the connected <a href="/facts/IPhone/h5WeKRl9">iPhone</a>, <a href="/facts/IPod_Touch/PRJabx51">iPod Touch</a>, or <a href="/facts/IPad/Ql67x0Dw">iPad</a>, then taking a serial signal from the iOS device translating that into a proper HDMI signal.<a class="footnote-ref" id="fnref:423" href="#fn:423"><sup>423</sup></a><a class="footnote-ref" id="fnref:424" href="#fn:424"><sup>424</sup></a> </p> <table><tbody><tr><th>Model no.</th><th>Image</th><th>First release</th><th>CPU <a href="/facts/Instruction_set/8p8vwUeE">ISA</a></th><th>Specs</th><th>Application</th><th>Utilizing devices</th><th><a href="/facts/Operating_system/8XTuvMh2">Operating system</a></th></tr><tr><th>339S0196</th><td></td><td>September 2012</td><td>Unknown<p><a href="/facts/ARM_architecture/SALsYA79">ARM</a></p></td><td>256 MBRAM</td><td>Lightning toHDMI conversion</td><td>Apple DigitalAV Adapter</td><td><a href="/facts/XNU/dUCpExf0">XNU</a></td></tr></tbody></table> <h2 id="see-also">See also</h2> <ul><li><a href="/facts/ARM_Cortex-A9/7frBGbbK">ARM Cortex-A9</a></li> <li><a href="/facts/List_of_iPhone_models/29EaCpyA">List of iPhone models</a></li> <li><a href="/facts/List_of_iPad_models/29EaCpyA">List of iPad models</a></li> <li><a href="/facts/List_of_Mac_models_grouped_by_CPU_type/0fKf4WMr">List of Mac models grouped by CPU type</a></li> <li>List of Samsung platforms (SoCs): <ul><li><a href="/facts/Exynos/VSMI3vDf">Exynos</a> (none have been used by Apple)</li> <li><a href="/facts/List_of_Samsung_systems_on_a_chip/8e76sf28">historical</a> (some were used in Apple products)</li></ul></li> <li><a href="/facts/PowerVR/lTtwow8j">PowerVR SGX</a> GPUs were also used in the <a href="/facts/IPhone_3GS/Joy8L6r7">iPhone 3GS</a> and the third-generation iPod Touch</li> <li><a href="/facts/PWRficient/cEMqJINj">PWRficient</a>, a processor designed by <a href="/facts/P.A._Semi/eSIDE7tk">P.A. Semi</a>, a company Apple acquired to form an in-house custom chip design department</li></ul> <h3>Similar platforms</h3> <ul><li><a href="/facts/Allwinner_A31/Ne1uaFGF">A31</a> by <a href="/facts/AllWinner_Technology_Co._Ltd./Ne1uaFGF">AllWinner</a></li> <li><a href="/facts/Atom_(system_on_a_chip)/CJDxJ6Ve">Atom</a> by <a href="/facts/Intel/SMF0gJJX">Intel</a></li> <li>BCM2xxxx by <a href="/facts/Broadcom/pbh0q7ht">Broadcom</a></li> <li>eMAG and Altra by <a href="/facts/Ampere_Computing/Thm3WjPm">Ampere Computing</a></li> <li><a href="/facts/Exynos/VSMI3vDf">Exynos</a> by <a href="/facts/Samsung/oNXUwDjn">Samsung</a></li> <li><a href="/facts/I.MX/vy54xSxs">i.MX</a> by <a href="/facts/Freescale_Semiconductor/mRjBBbeX">Freescale Semiconductor</a></li> <li><a href="/facts/Jaguar_(microarchitecture)/PkCbNj9a">Jaguar</a> and <a href="/facts/Puma_(microarchitecture)/ujJ1MBg1">Puma</a> by <a href="/facts/AMD/CB1G7QTb">AMD</a></li> <li><a href="/facts/HiSilicon/F5Au3xGm">Kirin</a> by HiSilicon</li> <li><a href="/facts/List_of_MediaTek_systems_on_chips/DKVQYqFc">MTxxxx</a> by <a href="/facts/MediaTek/X0yoLa9D">MediaTek</a></li> <li><a href="/facts/NovaThor/K9p3Vlkn">NovaThor</a> by <a href="/facts/ST-Ericsson/T6V8shaS">ST-Ericsson</a></li> <li><a href="/facts/OMAP/3oz3mLlT">OMAP</a> by <a href="/facts/Texas_Instruments/88NUhuHF">Texas Instruments</a></li> <li><a href="/facts/Rockchip/JlnnEBnY">RK3xxx</a> by <a href="/facts/Rockchip/JlnnEBnY">Rockchip</a></li> <li><a href="/facts/Qualcomm_Snapdragon/FWJM1F0x">Snapdragon</a> by <a href="/facts/Qualcomm/v54S3UgA">Qualcomm</a></li> <li><a href="/facts/Tegra/qolVa8CJ">Tegra</a> by <a href="/facts/Nvidia/8QfCgqbu">Nvidia</a></li></ul> <h2 id="notes">Notes</h2> <h2 id="further-reading">Further reading</h2> <ul><li>Gurman, Mark (January 29, 2018). <a href="https://www.bloomberg.com/graphics/2018-apple-custom-chips/">"How Apple Built a Chip Powerhouse to Threaten Qualcomm and Intel"</a>. <i><a href="/facts/Bloomberg_Businessweek/EsGLjcge">Bloomberg Businessweek</a></i>.</li></ul> <h2 id="references">References</h2> <ol> <li id="fn:1"><p>"Apple announces Mac transition to Apple silicon" (Press release). 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