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Reference.org
Structured ASIC platform
open-in-new
See also
Gate array
Altera
Corp - "
HardCopy II Structured ASICs
"
eASIC
Corp - "
Nextreme Structured ASIC
"
Chun Hok Ho et al. - "
Floating Point FPGA: Architecture and Modelling
"
Chun Hok Ho et al. - "
DOMAIN-SPECIFIC HYBRID FPGA: ARCHITECTURE AND FLOATING POINT APPLICATIONS
"
Steve Wilton et al. - "
A Synthesizable Datapath-Oriented Embedded FPGA Fabric
"
Steve Wilton et al. - "
A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications
"
Andy Ye and Jonathan Rose - "
Using Bus-Based Connections to Improve Field-Programmable Gate Array Density for Implementing Datapath Circuits
"
Ian Kuon, Aaron Egier and Jonathan Rose - "
Design, Layout and Verification of an FPGA using Automated Tools
"
Ian Kuon, Russell Tessier and Jonathan Rose - "
FPGA Architecture: Survey and Challenges
"
Ian Kuon and Jonathan Rose - "
Measuring the Gap Between FPGAs and ASICs
"
Stephane Badel and Elizabeth J. Brauer - "
Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells
"
Kanupriya Gulati, Nikhil Jayakumar and Sunil P. Khatri - "
A Structured ASIC Design Approach Using Pass Transistor Logic
"
Hee Kong Phoon, Matthew Yap and Chuan Khye Chai - "
A Highly Compatible Architecture Design for Optimum FPGA to Structured-ASIC Migration
"
Yajun Ran and
Malgorzata Marek-Sadowska
- "
Designing Via-Configurable Logic Blocks for Regular Fabric
"
R. Reed Taylor and Herman Schrnit - "
Creating a Power-aware Structured ASIC
"
Jennifer L. Wong, Farinaz Kourshanfar and Miodrag Potkonjak - "
Flexible ASIC: Shared Masking for Multiple Media Processors
"
External Links:
eda.ee.ucla.edu/EE201A-04Spring/ASICslides.ppt