C to HDL

<h2 id="history">History</h2>
<p>Early development on C to HDL was done by Ian Page, Charles Sweeney and colleagues at <a href="/facts/University_of_Oxford/ExVVQL6V">Oxford University</a> in the 1990s who developed the <a href="/facts/Handel-C/lTlHUwlp">Handel-C</a> language.  They <a href="/facts/Commercialization/4aatcHYn">commercialized</a> their research by forming Embedded Solutions Limited (ESL) in 1999 which was renamed Celoxica in September 2000.  In 2008, the embedded systems departments of Celoxica was sold to Catalytic for $3 million and which later merged to become Agility Computing.<a class="footnote-ref" id="fnref:1" href="#fn:1"><sup>1</sup></a>  In January 2009, <a href="/facts/Mentor_Graphics/EAs59CSJ">Mentor Graphics</a> acquired Agility's C synthesis assets.<a class="footnote-ref" id="fnref:2" href="#fn:2"><sup>2</sup></a>  Celoxica continues to trade concentrating on <a href="/facts/Hardware_acceleration/ej5sM7hB">hardware acceleration</a> to process transactions in the financial sector and other <a href="/facts/Industry_(economics)/nlB2hvkF">industries</a>.<a class="footnote-ref" id="fnref:3" href="#fn:3"><sup>3</sup></a>
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<h2 id="applications">Applications</h2>
<p>C to HDL techniques are most commonly applied to <a href="/facts/Application_software/YQuj7Kog">applications</a> that have unacceptably high <a href="/facts/Run-time_complexity/77T62gmf">execution times</a> on existing general-purpose <a href="/facts/Supercomputer/HT9NwGAN">supercomputer</a> architectures.  Examples include <a href="/facts/Bioinformatics/D5x2L8ee">bioinformatics</a>, <a href="/facts/Computational_fluid_dynamics/zuWdtNJp">computational fluid dynamics</a> (CFD), financial processing, and oil and gas survey data analysis.  <a href="/facts/Embedded_system/a4muX1wU">Embedded applications</a> requiring <a href="/facts/High_Performance_Computing/HT9NwGAN">high performance</a> or <a href="/facts/Real-time_operating_system/IvUCFwCL">real-time</a> <a href="/facts/Data_processing/74EKCDAq">data processing</a> are also an area of use.  <a href="/facts/System_on_a_chip/1RVvVe6N">System-on-chip</a> (SoC) design may also take advantage of C to HDL techniques.
</p><p>C-to-VHDL compilers are very useful for large designs or for implementing code that might change in the future.  Designing a large application entirely in HDL may be very difficult and time-consuming; the abstraction of a high level language for such a large application will often reduce total development time.  Furthermore, an application coded in HDL will almost certainly be more difficult to modify than one coded in a higher level language.  If the designer needs to add new functionality to the application, adding a few lines of C code will almost always be easier than remodeling the equivalent HDL code.
</p><p><a href="/facts/Flow_to_HDL/ohrIBdC4">Flow to HDL</a> tools have a similar aim, but with <a href="/facts/Dataflow_programming/60IdWpE1">flow</a> rather than C-based design.
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<h2 id="example-tools">Example tools</h2>
<ul><li><a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/smarthls-compiler">SmartHLS</a> (originally LegUp), ANSI C to Verilog tool developed by <a href="/facts/Microchip_Technology/7jDrY5rx">Microchip Technology</a>, based on LLVM compiler.</li>
<li><a href="https://www.cl.cam.ac.uk/~djg11/cvtovpage-real">CBG CtoV</a> A tool developed 1995-99 by DJ Greaves (<a href="/facts/University_of_Cambridge/0la7aX9o">University of Cambridge</a>) that instantiated RAMs and interpreted various <a href="/facts/SystemC/SEqgs3ka">SystemC</a> constructs and datatypes.</li>
<li>C-to-Verilog tool (<a href="/facts/No_instruction_set_computing/PKhpFRom">NISC</a>) from <a href="/facts/University_of_California,_Irvine/gS3nEt3V">University of California, Irvine</a></li>
<li><a href="http://www.altium.com/Products/AltiumDesigner/">Altium Designer 6.9 and 7.0</a> (a.k.a. Summer 08) from <a href="/facts/Altium/TMPJ5IXb">Altium</a></li>
<li><a href="https://www.intel.com/content/www/us/en/programmable/b/nios2-c2h.html">Nios II C-to-Hardware Acceleration Compiler</a> from <a href="/facts/Altera/66c0Gh0R">Altera</a></li>
<li><a href="/facts/Catapult_C/stBKgEfz">Catapult C</a> tool from  <a href="/facts/Mentor_Graphics/EAs59CSJ">Mentor Graphics</a></li>
<li>Cynthesizer from <a href="/facts/Forte_Design_Systems/Yq1F1rlb">Forte Design Systems</a></li>
<li><a href="/facts/SystemC/SEqgs3ka">SystemC</a> from <a href="http://www.celoxica.com/">Celoxica (defunct)</a></li>
<li><a href="/facts/Handel-C/lTlHUwlp">Handel-C</a> from <a href="http://www.celoxica.com/">Celoxica (defunct)</a></li>
<li>DIME-C from <a href="/facts/Nallatech/E4WqAoef">Nallatech</a></li>
<li><a href="/facts/Impulse_C/Yd1E9EHJ">Impulse C</a> from <a href="http://www.impulsec.com/">Impulse Accelerated Technologies</a></li>
<li><a href="https://www.fpga-cores.com/instant-soc/">Instant-SoC</a> from <a href="https://www.fpga-cores.com/">FPGA-Cores</a></li>
<li><a href="/facts/FpgaC/dB0AHlxu">FpgaC</a> which is an open source initiative</li>
<li><a href="/facts/SA-C_programming_language/SEFwamwj">SA-C programming language</a></li>
<li>Cascade (C to RTL synthesizer) from CriticalBlue</li>
<li>Mitrion-C from <a href="/facts/Mitrionics/ypRxwFzl">Mitrionics</a></li>
<li>SPARK (a C-to-VHDL) from <a href="/facts/University_of_California,_San_Diego/srMClpNv">University of California, San Diego</a><a class="footnote-ref" id="fnref:4" href="#fn:4"><sup>4</sup></a></li>
<li>VLSI/VHDL CAD Group Index of Useful Tools from <a href="/facts/Case_Western_Reserve_University/S0xlUbTM">Case Western Reserve University</a><a class="footnote-ref" id="fnref:5" href="#fn:5"><sup>5</sup></a></li>
<li><a href="/facts/MyHDL/zsclBadP">MyHDL</a> is a Python-subset compiler and simulator to <a href="/facts/VHDL/H6Exdjfs">VHDL</a> and <a href="/facts/Verilog/efVqbKXg">Verilog</a><a class="footnote-ref" id="fnref:6" href="#fn:6"><sup>6</sup></a></li></ul>
<h2 id="see-also">See also</h2>
<ul><li><a href="/facts/Comparison_of_EDA_Software/uCYS0eQY">Comparison of EDA Software</a></li>
<li><a href="/facts/Electronic_design_automation/o4la3fmX">Electronic design automation</a> (EDA)</li>
<li><a href="/facts/High-level_synthesis/fm5V1WN0">High-level synthesis</a></li>
<li><a href="/facts/Silicon_compiler/VEAQnpst">Silicon compiler</a></li>
<li><a href="/facts/Hardware_acceleration/ej5sM7hB">Hardware acceleration</a></li></ul>

<h2 id="external-links">External links</h2>
<ul><li><a href="http://www.ddj.com/dept/cpp/197004413">A good article on Dr Dobbs Journal about ImpulseC.</a></li>
<li><a href="http://www.cse.clrc.ac.uk/disco/publications/FPGA_overview_2.0.pdf">An overview of flows by Daresbury Labs.</a>[<i>permanent dead link</i>‍]</li>
<li><a href="http://web.comlab.ox.ac.uk/oucl/work/christian.peter/overview_handelc.html">An Overview of Hardware Compilation and the Handel-C language.</a></li>
<li><a href="https://web.archive.org/web/20070216180902/http://www.xilinx.com/products/design_tools/logic_design/advanced/esl/index.htm">Xilinx's ESL initiative, some products listed and C to VHDL tools.</a></li>
<li><a href="http://www.altium.com/Evaluate/DEMOcenter/#,11,0,1,3">Altium's C-to-Hardware Compiler overview.</a></li>
<li><a href="http://www.altera.com/literature/wp/wp-aghrdwr.pdf">Altera's Nios II C2H Acceleration Compiler White Paper.</a></li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>Clarke, Peter (1 April 2008). "Celoxica sells EDA business to Catalytic for $3 million". EE Times. <a href="http://www.eetimes.com/news/semi/rss/showArticle.jhtml?articleID=205208538&cid=RSSfeed_eetimes_semiRSS" target="_blank">http://www.eetimes.com/news/semi/rss/showArticle.jhtml?articleID=205208538&cid=RSSfeed_eetimes_semiRSS</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>Dylan McGrath (22 January 2009). "Mentor buys Agility's C synthesis assets". EETimes.com. <a href="http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=212902054" target="_blank">http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=212902054</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
<li id="fn:3"><p>Celoxica Ltd (22 January 2011). "Celoxica Ltd 'About Us'". Celoxica.com. Archived from the original on 16 January 2011. Retrieved 22 January 2011. <a href="https://web.archive.org/web/20110116031419/http://www.celoxica.com/aboutus/company.html" target="_blank">https://web.archive.org/web/20110116031419/http://www.celoxica.com/aboutus/company.html</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li>
<li id="fn:4"><p>"SPARK: High-Level Synthesis using Parallelizing Compiler Techniques". Archived from the original on 2009-10-24. Retrieved 2020-07-11. <a href="https://web.archive.org/web/20091024222430/http://mesl.ucsd.edu/spark/" target="_blank">https://web.archive.org/web/20091024222430/http://mesl.ucsd.edu/spark/</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li>
<li id="fn:5"><p>"VLSI CAD Group Index of Useful Tools". Archived from the original on 2011-07-19. Retrieved 2017-07-28.{{cite web}}:  CS1 maint: bot: original URL status unknown (link) <a href="https://web.archive.org/web/20110719183022/http://bear.cwru.edu/tools.html" target="_blank">https://web.archive.org/web/20110719183022/http://bear.cwru.edu/tools.html</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li>
<li id="fn:6"><p>"Home". myhdl.org. <a href="http://www.myhdl.org/" target="_blank">http://www.myhdl.org/</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></p></li>
</ol>

C to HDL open-in-new

C to HDL