Bit-serial architecture

<h2 id="see-also">See also</h2>
<ul><li><a href="/facts/Serial_computer/CaQGzRth">Serial computer</a></li>
<li><a href="/facts/1-bit_computing/ArKvhVbw">1-bit computing</a></li>
<li><a href="/facts/Bit_banging/7DpmIV0q">Bit banging</a></li>
<li><a href="/facts/Bit_slicing/lf0t4CB3">Bit slicing</a></li>
<li><a href="/facts/BKM_algorithm/e0r1Wszn">BKM algorithm</a></li>
<li><a href="/facts/CORDIC/sQqTjkd2">CORDIC</a></li></ul>

<h2 id="external-links">External links</h2>
<ul><li><a href="http://portal.acm.org/citation.cfm?id=503063">Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method</a></li>
<li><a href="http://portal.acm.org/citation.cfm?id=741014">BIT-Serial FIR filters with CSD Coefficients for FPGAs</a></li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>Denyer, Peter B.; Renshaw, David (1985). VLSI signal processing: a bit-serial approach. VLSI systems series. Addison-Wesley. ISBN 978-0-201-13306-6. <a href="978-0-201-13306-6" target="_blank">978-0-201-13306-6</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>Smith, Eric L. "brouhaha" (2023-08-09). "HP-15C CE woes: 1 bug, 2 limitations, 3 questions". MoHPC - The Museum of HP Calculators. Archived from the original on 2023-08-10. Retrieved 2023-09-24. <a href="https://www.hpmuseum.org/forum/thread-20281.html" target="_blank">https://www.hpmuseum.org/forum/thread-20281.html</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
<li id="fn:3"><p>Andraka., Raymond J. "Building a High Performance Bit Serial Processor in an FPGA" (PDF). <a href="http://www.fpga-guru.com/files/supercn.pdf" target="_blank">http://www.fpga-guru.com/files/supercn.pdf</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li>
</ol>

Bit-serial architecture open-in-new

Bit-serial architecture