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Language for Instruction Set Architecture
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<h2 id="history">History</h2> <p>LISA was initially developed at Institute for Integrated Signal Processing Systems (ISS) Aachen, belonging to <a href="/facts/RWTH_Aachen/m85nNsAH">RWTH Aachen</a> University, in <a href="/facts/Germany/paluuWBX">Germany</a>. The current official version from <a href="/facts/RWTH_Aachen/m85nNsAH">RWTH Aachen</a> is LISA 2.0. The language is still in evolution to cover research on processors, including <a href="/facts/Reconfigurable_computing/J4b2JsRB">Reconfigurable computing</a> (in LISA 3.0), <a href="/facts/Multi-core/ABNb65hQ">multi-core</a>, <a href="/facts/Parallel_programming/nQzcpzQt">parallel programming</a>. </p><p>One noticeable branch called LISA+ has been created for handling the modeling of peripherals such as interrupt controllers, timers, etc.<a class="footnote-ref" id="fnref:1" href="#fn:1"><sup>1</sup></a> </p> <h2 id="see-also">See also</h2> <ul><li><a href="/facts/Alphabetical_list_of_programming_languages/c9HqJl1r">Alphabetical list of programming languages</a></li> <li><a href="/facts/SystemC/SEqgs3ka">SystemC</a></li> <li><a href="/facts/Verilog/efVqbKXg">Verilog</a></li> <li><a href="/facts/VHDL/H6Exdjfs">VHDL</a></li></ul> <h3>Papers</h3> <ul><li>V. Zivojnovic, S. Pees, Ch. Schläger, H. Meyr, <i>LISA bridges gaps in high-tech languages</i>, Electronic Engineering Times, Oct 7, 1996</li> <li><a href="http://www.ice.rwth-aachen.de/fileadmin/publications/Zivojnovic96vlsi.pdf">[2]</a> V. Zivojnovic, S. Pees, H. Meyr, <i>LISA – machine description language and generic machine model for HW/SW co-design</i>, Proceedings of the IEEE Workshop on VLSI Signal Processing (San Francisco), Oct. 1996</li> <li>A. Chattopadhyay, H. Meyr and R. Leupers: <i>LISA: A Uniform ADL for Embedded Processor Modeling, Implementation and Software Toolsuite Generation</i> appearing in P. Mishra, N. Dutt, <i>Processor Description Languages, Volume 1</i>, Morgan Kaufmann, 2008. <a href="/facts/ISBN_(identifier)/15AdSPa9">ISBN</a> 978-0123742872</li></ul> <h3>Books</h3> <ul><li>A. Hoffmann, H. Meyr, R. Leupers: <i>Architecture Exploration for Embedded Processors with LISA</i>, Springer, 2010. <a href="/facts/ISBN_(identifier)/15AdSPa9">ISBN</a> 978-1441953346</li> <li>O. Wahlen: <i>C Compiler Aided Design of Application-specific Instruction-set Processors Using the Machine Description Language LISA (Berichte Aus Der Electrotechnik)</i>, <a href="/facts/Shaker_Verlag/qcRApkul">Shaker Verlag</a> GmbH, Germany (August 13, 2004). <a href="/facts/ISBN_(identifier)/15AdSPa9">ISBN</a> 3-8322-3035-1</li></ul> <h2 id="external-links">External links</h2> <ul><li><a href="https://www.ice.rwth-aachen.de/research/tools-projects/closed-projects/lisa">LISA</a> project page at RWTH Aachen, Germany</li> <li><a href="http://www.synopsys.com/IP/ProcessorIP/asip/processor-designer/Pages/default.aspx">Processor Designer</a> is a tool sold by <a href="/facts/Synopsys/Szv1V36J">Synopsys</a> to create processors from LISA 2.0 descriptions</li></ul> <h2 id="references">References</h2> <ol> <li id="fn:1"><p>[1] search for LISA+ Reference Language Manual <a href="http://infocenter.arm.com" target="_blank">http://infocenter.arm.com</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li> </ol>