Camera interface

<h2 id="electrical-connections">Electrical connections</h2>
<p>The camera interface's parallel interface consists of the following lines:
</p><p>8 to 12 bits parallel data line
These are parallel data lines that carry pixel data. The data transmitted on these lines change with every Pixel Clock (PCLK).
</p><p>Horizontal Sync (HSYNC)
This is a special signal that goes from the camera sensor or <a href="/facts/Image_processor/PGWDAKNM">ISP</a> to the camera interface. An HSYNC indicates that one line of the frame is transmitted.
</p><p>Vertical Sync (VSYNC)
This signal is transmitted after the entire frame is transferred. This signal is often a way to indicate that one entire frame is transmitted.
</p><p>Pixel Clock (PCLK)
This is the pixel clock and it would change on every pixel.
</p><p>NOTE: The above lines are all treated as input lines to the Camera Interface hardware.
</p>
<h2 id="see-also">See also</h2>
<ul><li><a href="/facts/Digital_camera/LSGTserm">Digital camera</a></li>
<li><a href="/facts/Digital_photography/a2UfweJh">Digital photography</a></li>
<li><a href="/facts/Demosaicing/sbtIMmN6">Demosaicing</a></li>
<li><a href="/facts/Digital_image_processing/zenalNCf">Digital image processing</a></li>
<li><a href="/facts/Camera_Serial_Interface/Dbsln1vw">Camera Serial Interface</a> (CSI)</li></ul>

Camera interface open-in-new

Camera interface