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Tukwila (processor)
open-in-new
<h2 id="xeon-compatibility">Xeon compatibility</h2> <p>It was originally stated that Tukwila and its associated chipset would bring socket compatibility between Intel's <a href="/facts/Xeon/j1M8Hp6D">Xeon</a> and Itanium processors, by introducing a new interconnect called <a href="/facts/Intel_QuickPath_Interconnect/BUfedB2U">Intel QuickPath Interconnect</a> (QuickPath, previously known as Common System Interface or CSI). This ultimate endeavor would help reduce product development costs for both Intel and its partners, by allowing for greater reuse of components and manufacturing processes.<a class="footnote-ref" id="fnref:5" href="#fn:5"><sup>5</sup></a> Tukwila is reported to have four "full" QuickPath links and two "half" links.<a class="footnote-ref" id="fnref:6" href="#fn:6"><sup>6</sup></a> </p><p>Whitefield, the first Xeon processor to feature QuickPath, suffered significant project delays and was cancelled.<a class="footnote-ref" id="fnref:7" href="#fn:7"><sup>7</sup></a> The first Xeon MP processor to feature QuickPath is <a href="/facts/Xeon/j1M8Hp6D">Beckton</a>.<a class="footnote-ref" id="fnref:8" href="#fn:8"><sup>8</sup></a> </p><p>The released Itanium 9300-series processors are using a separate socket, <a href="/facts/LGA_1248/TgVgVHXx">LGA 1248</a>, which is incompatible with Xeon processors and motherboards. </p> <h2 id="comparison-table">Comparison table</h2> <table><tbody><tr><th>Model</th><th>Cores</th><th>Threads</th><th>Core Clock (<a href="/facts/Hertz/6Wshj5qm">GHz</a>)</th><th>Core Clock with <a href="/facts/Turbo_Boost/W9I2PUcg">Intel Turbo Boost</a> (<a href="/facts/Hertz/6Wshj5qm">GHz</a>)</th><th>L3 <a href="/facts/CPU_cache/x8BYFcdv">Cache</a> (<a href="/facts/Mebibyte/BNHUp9Qq">MiB</a>)</th><th><a href="/facts/Intel_QuickPath_Interconnect/BUfedB2U">QPI</a> speed (GT/s)</th><th>TDP (watts)</th><th>February 2010 Price</th><th>Comments</th></tr><tr><td>9310</td><td>2</td><td>4</td><td>1.6</td><td>N/A</td><td>10</td><td>4.8</td><td>130</td><td>$946</td><td>Low power consumption</td></tr><tr><td>9320</td><td>4</td><td>8</td><td>1.33</td><td>1.46</td><td>16</td><td>4.8</td><td>155</td><td>$1,614</td><td>Value</td></tr><tr><td>9330</td><td>4</td><td>8</td><td>1.46</td><td>1.6</td><td>20</td><td>4.8</td><td>155</td><td>$2,059</td><td>Performance per watt</td></tr><tr><td>9340</td><td>4</td><td>8</td><td>1.6</td><td>1.73</td><td>20</td><td>4.8</td><td>185</td><td>$2,059</td><td>Price performance</td></tr><tr><td>9350</td><td>4</td><td>8</td><td>1.73</td><td>1.86</td><td>24</td><td>4.8</td><td>185</td><td>$3,838</td><td>Performance</td></tr></tbody></table> <h2 id="successor">Successor</h2> <p>The successor is code-named <i><a href="/facts/Poulson_(processor)/0wkjSDpe">Poulson</a></i>. It was initially slated for a Q4 2009 release and said to have over four cores, most likely eight.<a class="footnote-ref" id="fnref:9" href="#fn:9"><sup>9</sup></a><a class="footnote-ref" id="fnref:10" href="#fn:10"><sup>10</sup></a> </p><p>In 2009 an Intel representative stated that Intel would maintain a two-year development cycle for Itanium, implying Poulson would be released in Q1 2012.<a class="footnote-ref" id="fnref:11" href="#fn:11"><sup>11</sup></a> </p> <h2 id="references">References</h2> <ol> <li id="fn:1"><p>Michael Kanellos (December 18, 2003). "Intel changes code name of future Itanium". <a href="http://news.cnet.com/Intel-changes-code-name-of-future-Itanium/2100-1006_3-5129242.html" target="_blank">http://news.cnet.com/Intel-changes-code-name-of-future-Itanium/2100-1006_3-5129242.html</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li> <li id="fn:2"><p>BBC News (February 4, 2008). "Chips pass two billion milestone". <a href="/wiki/BBC_News" target="_blank">/wiki/BBC_News</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li> <li id="fn:3"><p>Sharon Gaudin (2008-02-04). "Intel squeezes 2 billion transistors onto new Itanium chip". Computerworld. Retrieved 2008-02-05. <a href="http://www.computerworld.com/action/article.do?command=viewArticleBasic&articleId=9060900&intsrc=hm_list" target="_blank">http://www.computerworld.com/action/article.do?command=viewArticleBasic&articleId=9060900&intsrc=hm_list</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li> <li id="fn:4"><p>Intel shows off Tukwila, first 2 billion transistor CPU <a href="https://arstechnica.com/hardware/news/2008/02/intel-shows-off-tukwila-first-2-billion-transistor-cpu.ars" target="_blank">https://arstechnica.com/hardware/news/2008/02/intel-shows-off-tukwila-first-2-billion-transistor-cpu.ars</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li> <li id="fn:5"><p>"Intel Changes CPU Road Map". PC World. October 25, 2005. Archived from the original on May 16, 2008. Retrieved October 26, 2005. <a href="https://web.archive.org/web/20080516112152/http://www.pcworld.com/news/article/0,aid,123190,00.asp" target="_blank">https://web.archive.org/web/20080516112152/http://www.pcworld.com/news/article/0,aid,123190,00.asp</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li> <li id="fn:6"><p>"Intel's Tukwila Confirmed to be Quad Core". 5 May 2006. Archived from the original on 13 January 2009. <a href="https://web.archive.org/web/20090113081149/http://www.realworldtech.com/page.cfm?NewsID=361§ion=news&date=05-05-2006#361" target="_blank">https://web.archive.org/web/20090113081149/http://www.realworldtech.com/page.cfm?NewsID=361§ion=news&date=05-05-2006#361</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></p></li> <li id="fn:7"><p>"Intel's CSI to outperform AMD's Hypertransport". The Register. 12 December 2005. <a href="https://www.theregister.co.uk/2005/12/12/intel_csi_low/" target="_blank">https://www.theregister.co.uk/2005/12/12/intel_csi_low/</a> <a href="#fnref:7" class="footnote-back-ref">↩</a></p></li> <li id="fn:8"><p>Ng, Jansen (10 February 2009). "Intel Aims for Efficiency With New Server Roadmap". DailyTech. Archived from the original on 13 February 2009. Retrieved 2009-02-10. <a href="https://web.archive.org/web/20090213150005/http://www.dailytech.com/intel+aims+for+efficiency+with+new+server+roadmap/article14224.htm" target="_blank">https://web.archive.org/web/20090213150005/http://www.dailytech.com/intel+aims+for+efficiency+with+new+server+roadmap/article14224.htm</a> <a href="#fnref:8" class="footnote-back-ref">↩</a></p></li> <li id="fn:9"><p>Intel Server and Workstation Roadmap Image <a href="http://pc.watch.impress.co.jp/docs/2008/0602/kaigai02l.gif" target="_blank">http://pc.watch.impress.co.jp/docs/2008/0602/kaigai02l.gif</a> <a href="#fnref:9" class="footnote-back-ref">↩</a></p></li> <li id="fn:10"><p>Ashlee Vance (11 July 2008). "IBM's eight-core Power7 chip to clock in at 4.0GHz". The Register. <a href="https://www.theregister.co.uk/2008/07/11/ibm_power7_ncsa/" target="_blank">https://www.theregister.co.uk/2008/07/11/ibm_power7_ncsa/</a> <a href="#fnref:10" class="footnote-back-ref">↩</a></p></li> <li id="fn:11"><p>"Intel ahead of schedule with new Xeon server chips". Computerworld. 2009-09-22. Archived from the original on 2011-06-05. Retrieved 2010-01-10. <a href="https://web.archive.org/web/20110605143255/http://www.computerworld.com/s/article/9138420/Intel_ahead_of_schedule_with_new_Xeon_server_chips" target="_blank">https://web.archive.org/web/20110605143255/http://www.computerworld.com/s/article/9138420/Intel_ahead_of_schedule_with_new_Xeon_server_chips</a> <a href="#fnref:11" class="footnote-back-ref">↩</a></p></li> </ol>