MCDRAM

<h2 id="programming">Programming</h2>
<p>The memory can be partitioned at boot time, with some used as cache for more distant DDR, and the remainder mapped into the physical address space.
</p><p>The application can request pages of <a href="/facts/Virtual_memory/Lw2GemF5">virtual memory</a> to be assigned to either the distant DDR directly, to the portion of DDR that is cached by the MCDRAM, or to the portion of the MCDRAM that is not being used as cache.  One way to do this is via thememkind API.<a class="footnote-ref" id="fnref:3" href="#fn:3"><sup>3</sup></a>
</p><p>When used as cache, the latency of a miss accessing both the MCDRAM and DDR is slightly higher than going directly to DDR, and so applications may need to be tuned<a class="footnote-ref" id="fnref:4" href="#fn:4"><sup>4</sup></a>
to avoid excessive cache misses.
</p>

<h2 id="external-links">External links</h2>

Wikimedia Commons has media related to Intel MIC.

<ul><li><a href="https://software.intel.com/en-us/articles/mcdram-high-bandwidth-memory-on-knights-landing-analysis-methods-tools">MCDRAM (High Bandwidth Memory) on Knights Landing – Analysis Methods & Tools</a></li>
<li><a href="https://software.intel.com/en-us/blogs/2016/01/20/an-intro-to-mcdram-high-bandwidth-memory-on-knights-landing">An Intro to MCDRAM (High Bandwidth Memory) on Knights Landing</a></li>
<li><a href="https://software.intel.com/en-us/articles/high-bandwidth-memory-hbm-how-will-it-benefit-your-application">High Bandwidth Memory (HBM): how will it benefit your application?</a></li>
<li><a href="https://www.micron.com/~/media/documents/products/presentation/hmc_webinar_july_2017.pdf">Micron HMC Webinar July 2017 slides</a></li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>Mike P. (sic) (January 20, 2016). "An Intro to MCDRAM (High Bandwidth Memory) on Knights Landing". software.intel.com. Retrieved April 18, 2016. <a href="https://software.intel.com/en-us/blogs/2016/01/20/an-intro-to-mcdram-high-bandwidth-memory-on-knights-landing" target="_blank">https://software.intel.com/en-us/blogs/2016/01/20/an-intro-to-mcdram-high-bandwidth-memory-on-knights-landing</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>Ian Cutress (November 16, 2015). "A few notes on Intel's Knights Landing and MDRAM modes from SC15". www.anandtech.com. Retrieved April 18, 2016. <a href="http://www.anandtech.com/show/9794/a-few-notes-on-intels-knights-landing-and-mcdram-modes-from-sc15" target="_blank">http://www.anandtech.com/show/9794/a-few-notes-on-intels-knights-landing-and-mcdram-modes-from-sc15</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
<li id="fn:3"><p>Christopher Cantalupo; et al. (March 18, 2015). "User Extensible Heap Manager for Heterogeneous Memory Platforms and Mixed Memory Policies" (PDF). memkind.github.io. Retrieved April 18, 2016. <a href="https://memkind.github.io/memkind/memkind_arch_20150318.pdf" target="_blank">https://memkind.github.io/memkind/memkind_arch_20150318.pdf</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li>
<li id="fn:4"><p>Mike P. (sic) (March 10, 2016). "MCDRAM (High Bandwidth Memory) on Knights Landing – Analysis Methods & Tools". software.intel.com. Retrieved April 18, 2016. <a href="https://software.intel.com/en-us/articles/mcdram-high-bandwidth-memory-on-knights-landing-analysis-methods-tools" target="_blank">https://software.intel.com/en-us/articles/mcdram-high-bandwidth-memory-on-knights-landing-analysis-methods-tools</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li>
</ol>

MCDRAM open-in-new

MCDRAM