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Achronix
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<h2 id="products">Products</h2> <ul><li><a href="https://www.achronix.com/product/speedster7t/">Speedster7t FPGAs</a> - Standalone FPGA devices built on <a href="/facts/TSMC/B4BdojRk">TSMC</a> 7 nm <a href="/facts/FinFET/xox63kP7">FinFET</a> technology. It includes a 2D Network-on-Chip (NoC), GDDR6 memory interfaces, up to 72 transceivers operating at 1-112 Gbit/s, 400G Ethernet MACs, PCIe Gen5 controllers and up to 1,760 machine learning processors (MLP) for mathematical operations with variable precision number formats.<a class="footnote-ref" id="fnref:9" href="#fn:9"><sup>9</sup></a></li> <li><a href="https://www.achronix.com/product/speedcore/">Speedcore eFPGAs</a> - Embedded FPGA IP that is integrated into a SoC or ASIC device. It consists of customer defined amounts of reconfigurable logic blocks, logic and block RAM, DSP blocks and Machine Learning Process (MLP) blocks. Speedcore is supported in TSMC 16FF+, TSMC 7 nm FinFET and TSMC 12FFC is under development.<a class="footnote-ref" id="fnref:10" href="#fn:10"><sup>10</sup></a></li> <li><a href="https://www.achronix.com/vectorpath/">VectorPath Accelerator Cards</a> - PCIe card which is based on the Speedster7t FPGA family. This card includes 400G and 200G network interfaces, 8 GDDR6 memories, and additional expansion ports for custom connectivity.<a class="footnote-ref" id="fnref:11" href="#fn:11"><sup>11</sup></a></li> <li>ACE - FPGA development tools which are used to design for all of Achronix's FPGA and eFPGA devices.<a class="footnote-ref" id="fnref:12" href="#fn:12"><sup>12</sup></a><a class="footnote-ref" id="fnref:13" href="#fn:13"><sup>13</sup></a></li></ul> <h2 id="see-also">See also</h2> <ul><li><a href="/facts/Altera/66c0Gh0R">Altera</a></li> <li><a href="/facts/Xilinx/rbXfxqqG">Xilinx</a></li></ul> <h2 id="further-reading">Further reading</h2> <ul><li><a href="https://www.theregister.co.uk/2010/11/01/intel_achronix_fab_deal/">"Intel lets outside chip maker into its fabs. Achronix goes all red, white, and blue"</a>, <i><a href="/facts/The_Register/3CEJaRob">The Register</a></i>, 1 November 2010</li> <li><a href="http://www.realworldtech.com/achronix/">"Exploring the Intel and Achronix Deal"</a>, David Kanter, Real World Tech, November 8, 2010</li> <li><a href="http://www.elektroniknet.de/halbleiter/sonstiges/artikel/87670/">"22-nm-Chips von Intel heben Startup auf FPGA-Thron"</a> <a href="https://web.archive.org/web/20200726171148/https://www.elektroniknet.de/halbleiter/sonstiges/artikel/87670/">Archived</a> 2020-07-26 at the <a href="/facts/Wayback_Machine/nmQ3a6JC">Wayback Machine</a> // Frank Riemenschneider, Elektronik Net, (in German), 2012-04-24</li> <li><a href="https://blogs.wsj.com/digits/2013/02/20/intels-first-factory-customer-touts-made-in-usa-chips/">"Intel’s First Factory Customer Touts Made-in-USA Chips"</a>, <i><a href="/facts/The_Wall_Street_Journal/9Pkf2cYK">The Wall Street Journal</a></i>, Feb 20, 2013</li> <li><a href="http://www.eejournal.com/archives/articles/20130226-achronix">"Breaking the Balance. Achronix FPGAs Disrupt the Status Quo"</a>, Kevin Morris, EEJournal, February 26, 2013</li> <li><a href="https://web.archive.org/web/20130927150531/http://www.programmableplanet.com/author.asp?section_id=2042&doc_id=260287&print=yes">"My Take on Achronix & Its Products"</a>, Paul Dillien, All programmable planet, 3/11/2013</li> <li>Alexander Bachmutsky, <a href="https://books.google.com/books?id=q9ky8sw8LoAC&pg=PT152&dq=Achronix"><i>System Design for Telecommunication Gateways</i></a>, chapter "3.5.2.1 Achronix FPGAs"</li></ul> <h2 id="external-links">External links</h2> <ul><li><a href="https://www.achronix.com/">Official website</a> </li></ul> <h2 id="references">References</h2> <ol> <li id="fn:1"><p>"Achronix and Signoff Semiconductors Partner for AI/ML FPGA and eFPGA IP Design Services". edacafe.com. Retrieved 2021-12-15. <a href="https://www.edacafe.com/nbc/articles/1/1862070/Achronix-Signoff-Semiconductors-Partner-AI-ML-FPGA-eFPGA-IP-Design-Services" target="_blank">https://www.edacafe.com/nbc/articles/1/1862070/Achronix-Signoff-Semiconductors-Partner-AI-ML-FPGA-eFPGA-IP-Design-Services</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li> <li id="fn:2"><p>"Achronix SPAC Merger? 6 Things to Know About the Semiconductor Play Ahead of Any ACE Deal". investorplace.com. 6 January 2021. Retrieved 2021-12-15. <a href="https://investorplace.com/2021/01/achronix-spac-merger-6-things-to-know-about-the-semiconductor-play-ahead-of-any-ace-deal/" target="_blank">https://investorplace.com/2021/01/achronix-spac-merger-6-things-to-know-about-the-semiconductor-play-ahead-of-any-ace-deal/</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li> <li id="fn:3"><p>"Achronix's Speedcore eFPGA Devices to be Highlighted at TSMC 2018 North America, China Technology Events in May". design-reuse.com. Retrieved 2021-12-15. <a href="https://www.design-reuse.com/news/43963/achronix-speedcore-efpga-tsmc-2018-north-america.html" target="_blank">https://www.design-reuse.com/news/43963/achronix-speedcore-efpga-tsmc-2018-north-america.html</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li> <li id="fn:4"><p>"EE Times updates list of emerging startups". eetimes.com. Retrieved 2021-12-27. <a href="https://www.eetimes.com/ee-times-updates-list-of-emerging-startups-3/" target="_blank">https://www.eetimes.com/ee-times-updates-list-of-emerging-startups-3/</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li> <li id="fn:5"><p>Nenni, Daniel. "In Their Own Words: Achronix". Semiwiki. Retrieved 2019-11-26. <a href="https://semiwiki.com/efpga/273494-in-their-own-words-achronix/" target="_blank">https://semiwiki.com/efpga/273494-in-their-own-words-achronix/</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li> <li id="fn:6"><p>"Achronix Grew 700% Last Year...eFPGA is a Thing". community.cadence.com. Retrieved 2021-12-27. <a href="https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/achronix" target="_blank">https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/achronix</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></p></li> <li id="fn:7"><p>"ACEV And Achronix Offer Fairly Priced Upside To The Red Hot Semi Market". seekingalpha.com. Retrieved 2021-12-27. <a href="https://seekingalpha.com/article/4415817-acev-and-achronix-offer-exposure-to-high-growth-efpga-story" target="_blank">https://seekingalpha.com/article/4415817-acev-and-achronix-offer-exposure-to-high-growth-efpga-story</a> <a href="#fnref:7" class="footnote-back-ref">↩</a></p></li> <li id="fn:8"><p>Achronix press release, 12 July 2021 <a href="https://www.achronix.com/press-releases/achronix-and-ace-convergence-acquisition-corp-mutually-agree-terminate-merger" target="_blank">https://www.achronix.com/press-releases/achronix-and-ace-convergence-acquisition-corp-mutually-agree-terminate-merger</a> <a href="#fnref:8" class="footnote-back-ref">↩</a></p></li> <li id="fn:9"><p>says, TotallyLost (2019-05-21). "Achronix 7nm Speedster7t FPGAs". EEJournal. Retrieved 2019-11-26. <a href="https://www.eejournal.com/article/acrhonix-7nm-speedster7t-fpgas/" target="_blank">https://www.eejournal.com/article/acrhonix-7nm-speedster7t-fpgas/</a> <a href="#fnref:9" class="footnote-back-ref">↩</a></p></li> <li id="fn:10"><p>"Achronix Accelerates eFPGA". EEJournal. 2018-12-05. Retrieved 2019-11-26. <a href="https://www.eejournal.com/article/achronix-acceleratres-efpga/" target="_blank">https://www.eejournal.com/article/achronix-acceleratres-efpga/</a> <a href="#fnref:10" class="footnote-back-ref">↩</a></p></li> <li id="fn:11"><p>"Achronix and BittWare Accelerate Your Socks Off!". EEJournal. 2019-10-31. Retrieved 2019-11-26. <a href="https://www.eejournal.com/article/achronix-and-bittware-accelerate-your-socks-off/" target="_blank">https://www.eejournal.com/article/achronix-and-bittware-accelerate-your-socks-off/</a> <a href="#fnref:11" class="footnote-back-ref">↩</a></p></li> <li id="fn:12"><p>"ACE". Achronix Semiconductor Corp. Retrieved 2019-11-26. <a href="https://www.achronix.com/product/ace/" target="_blank">https://www.achronix.com/product/ace/</a> <a href="#fnref:12" class="footnote-back-ref">↩</a></p></li> <li id="fn:13"><p>"How to Design SmartNICs Using FPGAs to Increase Server Compute Capacity". design-reuse.com. Retrieved 2021-12-28. <a href="https://www.design-reuse.com/articles/46833/how-to-design-smartnics-using-fpgas-to-increase-server-compute-capacity.html" target="_blank">https://www.design-reuse.com/articles/46833/how-to-design-smartnics-using-fpgas-to-increase-server-compute-capacity.html</a> <a href="#fnref:13" class="footnote-back-ref">↩</a></p></li> </ol>