Open Graphics Project

<p>The project's first product was a <a href="/facts/Peripheral_Component_Interconnect/n6CGuFvP">PCI</a> graphics card dubbed OGD1, which used a <a href="/facts/Field-programmable_gate_array/M8LSGcAU">field-programmable gate array</a> (FPGA) chip. Although the card did not have the same level of performance or functionality as graphics cards on the market at the time, it was intended to be useful as a tool for prototyping the project's first <a href="/facts/Application-specific_integrated_circuit/YGUXpX50">application-specific integrated circuit</a> (ASIC) board, as well as for other professionals needing programmable graphics cards or FPGA-based prototyping boards. It was also hoped that this prototype would attract enough interest to gain some profit and attract investors for the next card, since it was expected to cost around US$2,000,000 to start the production of a specialized ASIC design. <a href="/facts/PCI_Express/ADhsLCUK">PCI Express</a> and/or <a href="/facts/Mini-PCI/n6CGuFvP">Mini-PCI</a> variations were planned to follow. The OGD1 began shipping in September 2010,<a class="footnote-ref" id="fnref:1" href="#fn:1"><sup>1</sup></a> some six years after the project began and 3 years after the appearance of the first prototypes.<a class="footnote-ref" id="fnref:2" href="#fn:2"><sup>2</sup></a>
</p><p>Full specifications will be published and open-source <a href="/facts/Device_driver/rDYnHU1G">device drivers</a> will be released. All <a href="/facts/Register_transfer_level/SDA3ET30">RTL</a> will be released. Source code to the device drivers and <a href="/facts/BIOS/2RY3dzQe">BIOS</a> will be released under the <a href="/facts/MIT_License/8llAQtlk">MIT</a> and <a href="/facts/BSD_licenses/XLtmLp5x">BSD licenses</a>. The RTL (in <a href="/facts/Verilog/efVqbKXg">Verilog</a>) used for the FPGA and the RTL used for the ASIC are planned to be released under the <a href="/facts/GNU_General_Public_License/S75KhLSX">GNU General Public License</a> (GPL).
</p><p>It has 256 <a href="/facts/MiB/bH1dt0oW">MiB</a> of DDR RAM, is passively cooled, and follows the <a href="/facts/Display_Data_Channel/2lclVrQm">DDC</a>, <a href="/facts/Extended_display_identification_data/WRY4Fueg">EDID</a>, <a href="/facts/VESA_Display_Power_Management_Signaling/RgwDx1XM">DPMS</a> and <a href="/facts/VESA_BIOS_Extensions/h0zmB0qW">VBE</a> VESA standards. <a href="/facts/TV-out/fsQryHov">TV-out</a> is also planned.
</p>
<h3>Versioning schema</h3>
<p>Versioning schema for OGD1 will go like this:
</p><p>{Root Number} – {Video Memory}{Video Output Interfaces}{Special Options e.g.: A1 OGA firmware installed}
</p>
<table><tbody><tr><th>Field</th><th>Example Value</th><th>Example Description</th></tr><tr><td>Root number</td><td>OGD1P-</td><td>OGD1 board with PCI Bus</td></tr><tr><td>Video memory</td><td>256</td><td>256 MiB</td></tr><tr><td colspan="3"><i>Video outputs, in order, skip any not installed</i></td></tr><tr><td>First interface</td><td>D</td><td>Dual-link DVI</td></tr><tr><td>Second interface</td><td>D</td><td>Dual-link DVI</td></tr><tr><td>Third interface</td><td>A</td><td>Analog video, 75 ohm, VGA compatible</td></tr><tr><td>Fourth interface</td><td>V</td><td>TV video</td></tr><tr><td colspan="3"><i>Special options, in alphanumeric order, each preceded by a dash</i></td></tr><tr><td>Factory firmware-RTL</td><td>A1</td><td>OGA1 Firmware</td></tr></tbody></table>
<h3>OGD1 components</h3>

<p>Main components of OGD1 graphics card (shown on the picture)<a class="footnote-ref" id="fnref:3" href="#fn:3"><sup>3</sup></a>
</p>
A) <a href="/facts/Digital_Visual_Interface/Dpnu9JmB">DVI</a> transmitter pair A
B) DVI transmitter pair B
C) 330MHz triple 10-bit <a href="/facts/Digital-to-analog_converter/5loEvAeb">DAC</a> (behind)
D) TV chip
E) 2x4 256 megabit <a href="/facts/DDR_SDRAM/N8UkI3zN">DDR SDRAM</a> (front, behind)
F) <a href="/facts/Xilinx/rbXfxqqG">Xilinx</a> 3S4000 <a href="/facts/Field-programmable_gate_array/M8LSGcAU">FPGA</a> (main chip)
G) <a href="/facts/Lattice_Semiconductor/aPJY9jNu">Lattice</a> XP10 FPGA (host interface)
H) SPI <a href="/facts/Programmable_read-only_memory/amoyxIFx">PROM</a> 1 <a href="/facts/Mebibit/sbVr3xfY">Mibit</a>
J) SPI PROM 16 Mibit
K) 3x 500 MHz DACs (optional)
L) 64-bit <a href="/facts/PCI-X/toN6KtKy">PCI-X</a> edge connector
M) <a href="/facts/DVI-I/Dpnu9JmB">DVI-I</a> connector A and connector B
N) <a href="/facts/S-Video/shm26vB5">S-Video</a> connector
O) 100-pin expansion bus connector
<h2 id="divisionsterms-related-to-ogp">Divisions/terms related to OGP</h2>
Open Graphics Project (OGP)
The group of people developing OGA, its written documentation, and its products.
Open Graphics Architecture (OGA)
The trade name for open graphics architectures specified by the Open Graphics Project.
Open Graphics Development (OGD)
The initial FPGA-based experimentation board used as a test platform for TRV ASICs.
Traversal Technology (TRV)
The commercial name for the first ASIC products, based on the Open Graphics Architecture.
Open Graphics Card (OGC)
Graphics cards based on TRV chips.
Open Hardware Foundation (OHF)
A non-profit corporation whose charter is to promote the design and production of open-source and open-documentation hardware.
<h2 id="current-status">Current status</h2>
<p>The OGP project failed to gain the necessary funding to produce an ASIC version of its card.  The project appears to have been discontinued in 2011.
</p>
<h2 id="see-also">See also</h2>
<ul>
<li>Electronics portal</li><li>Free and open-source software portal</li></ul>
<ul><li><a href="/facts/Graphics_hardware_and_FOSS/h1Wo2nME">Graphics hardware and FOSS</a></li>
<li><a href="/facts/Open-source_hardware/UgCHeVsm">Open-source hardware</a></li>
<li><a href="/facts/Open_system_(computing)/tVwr9W6r">Open system (computing)</a></li>
<li><a href="/facts/RISC-V/pUSKDat1">RISC-V</a></li></ul>

<h2 id="external-links">External links</h2>
<ul><li><a href="http://web.archive.org/web/20100609075313/http://wiki.opengraphics.org/tiki-index.php">The official Open Graphics wiki</a> archived at the <a href="/facts/Wayback_Machine/nmQ3a6JC">Wayback Machine</a> June 9, 2010</li>
<li>Jeremy Andrews (1 March 2006). <a href="http://kerneltrap.org/node/6272">"Hardware: Open Graphics Development Board Pricing"</a>. <a href="/facts/KernelTrap/TU9TNhG6">KernelTrap</a>. Retrieved 4 September 2006.</li>
<li><a href="http://www.wacco.mveas.com/projectvga.php">Project VGA</a> – another free graphics core project, aiming at cheaper hardware</li>
<li><a href="http://icculus.org/manticore/">Manticore</a> – an older FPGA-based free graphics core implementation. As of 2009-05-04 no source is available.</li>
<li>The master thesis "<a href="http://liu.diva-portal.org/smash/record.jsf?pid=diva2:20165">An FPGA-based 3D Graphics System</a>" illustrates very well the design decisions to make, while developing a FPGA-based 3D graphics core.</li>
<li>The master thesis "<a href="https://web.archive.org/web/20110727083331/http://www.milkymist.org/thesis/thesis.pdf">A performance-driven SoC architecture for video synthesis</a>" gives a more complete and hands-on approach of some aspects.</li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>"OGD1's Now Available!". Archived from the original on 15 June 2017. Retrieved 12 January 2017. <a href="https://web.archive.org/web/20170615123107/http://lists.duskglow.com/open-graphics/2010-September/012160.html" target="_blank">https://web.archive.org/web/20170615123107/http://lists.duskglow.com/open-graphics/2010-September/012160.html</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>"First Open Graphics board appears". The Inquirer. Archived from the original on 15 January 2007. <a href="https://web.archive.org/web/20070115142617/http://www.theinquirer.net/default.aspx?article=36761" target="_blank">https://web.archive.org/web/20070115142617/http://www.theinquirer.net/default.aspx?article=36761</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
<li id="fn:3"><p>"OGD1 map guide". Open Graphics wiki. Archived from the original on 27 September 2007. Retrieved 4 September 2006. <a href="https://web.archive.org/web/20070927065410/http://wiki.duskglow.com/tiki-page.php?pageName=OGD1_Map_Guide" target="_blank">https://web.archive.org/web/20070927065410/http://wiki.duskglow.com/tiki-page.php?pageName=OGD1_Map_Guide</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li>
</ol>

Open Graphics Project open-in-new

Open Graphics Project