The line interface consists of: SOUT, SIN, /RTS, /DTR, DSR, /DCD, /CTS, /RI5
Clock interface: XIN, XOUT, /BAUDOUT, RCLK6
Computer interface: D0..D7, /RD, /WR, INTRPT, MR, A0, A1, A2, ADS, WR, RD, /CS2, CS1, CS07
The interrupt line will (when the IER bit has enabled it) be triggered to go high when one of the following events occur: Receiver line status, Received data available, Transmitter holding register empty, and MODEM status. The interrupt signal is reset to low level upon the appropriate interrupt service or a reset operation (via MR).8
The 8250 UART was used in several 8-bit computers at least since 1978. IBM used the 8250 UART in the IBM PC (1981). The 8250A and 8250B revisions were later released, and the 16450 was introduced with the IBM Personal Computer/AT (1984).
The main difference between releases was the maximum communication speed.9
IBM refused to use Intel 8251 in the serial port adapter because Intel chip had no internal baudrate generator, and the adapter had to be more complex and expensive. Later IBM implemented Synchronous Communication Adapter, but it was not popular.
Van Gilluwe, Frank (1997). Undocumented PC (2 ed.). Addison Wesley. ISBN 0-20147950-8. 0-20147950-8 ↩
Paul, Matthias R. (2002-04-06). "Re: [fd-dev] ANNOUNCE: CuteMouse 2.0 alpha 1". freedos-dev. Archived from the original on 2020-02-07. Retrieved 2020-02-07. (NB. Has various information on 8250 chip bugs.) https://marc.info/?l=freedos-dev&m=101807226917577 ↩
National Semiconductor PC16450C/NS16450, PC8250A/INS8250A Universal Asynchronous Receiver Transmitter; datasheet 1990 /wiki/National_Semiconductor ↩
"Serial UART, an in-depth tutorial". /NB. Focus on 16550 primarily.) https://www.lammertbies.nl/comm/info/serial-uart.html ↩