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Segger Microcontroller Systems
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<h2 id="history">History</h2> <p>Segger Microcontroller was founded in 1992 by Rolf Segger in <a href="/facts/Hilden/fGH3YXyw">Hilden</a>, Germany.<a class="footnote-ref" id="fnref:2" href="#fn:2"><sup>2</sup></a> The first product was the <a href="/facts/Real-time_operating_system/IvUCFwCL">real-time operating system</a> (RTOS), now named embOS. It was followed by emWin two years later. Initial products focused on RTOS and <a href="/facts/Middleware/HobNosz9">middleware</a> products. However, the company later produced ISP-programming tools (Flasher) and debug probes (J-Link). In 2015, Segger introduced Embedded Studio, their <a href="/facts/Cross-platform_software/16zqdvNR">cross-platform</a> IDE for <a href="/facts/Central_processing_unit/Jxp1bqMV">central processing units</a> conforming to the <a href="/facts/ARM_architecture/SALsYA79">ARM architecture</a>, though recent versions are also used by <a href="/facts/RISC-V/pUSKDat1">RISC-V</a>. All products are developed, maintained and updated in Germany except for Embedded Studio, which is primarily developed by a team of developers in the <a href="/facts/United_Kingdom/kuPAILt2">United Kingdom</a>. </p> <h2 id="product-categories">Product categories</h2> <h3>Debug and trace probes</h3> <p>Segger is most noted for its J-Link family, which supports <a href="/facts/JTAG/IxRc5rG7">JTAG</a> (Joint Test Action Group) and SWD (Serial Wire Debug) debug probes for microcontrollers that have older ARM cores (<a href="/facts/ARM7/YQuwF2Lc">ARM7</a>, <a href="/facts/ARM9/tycMHVAJ">ARM9</a>, <a href="/facts/ARM11/RBYoh2hU">ARM11</a>), ARM Cortex-M cores (<a href="/facts/ARM_Cortex-M0/prW99nkV">M0</a>, <a href="/facts/ARM_Cortex-M0%2B/prW99nkV">M0+</a>, <a href="/facts/ARM_Cortex-M1/prW99nkV">M1</a>, <a href="/facts/ARM_Cortex-M3/prW99nkV">M3</a>, <a href="/facts/ARM_Cortex-M4/prW99nkV">M4</a>, <a href="/facts/ARM_Cortex-M7/prW99nkV">M7</a>, <a href="/facts/ARM_Cortex-M23/prW99nkV">M23</a>, <a href="/facts/ARM_Cortex-M33/prW99nkV">M33</a>, M85), ARM Cortex-R cores (<a href="/facts/ARM_Cortex-R4/0PMkeUJF">R4</a>, <a href="/facts/ARM_Cortex-R5/0PMkeUJF">R5</a>, <a href="/facts/ARM_Cortex-R8/0PMkeUJF">R8</a>), ARM Cortex-A cores (<a href="/facts/ARM_Cortex-A5/F8QS0Phr">A5</a>, <a href="/facts/ARM_Cortex-A7/Ch36KljD">A7</a>, <a href="/facts/ARM_Cortex-A8/vM6beXwg">A8</a>, <a href="/facts/ARM_Cortex-A9/7frBGbbK">A9</a>, <a href="/facts/ARM_Cortex-A12/d8wzUeBd">A12</a>, <a href="/facts/ARM_Cortex-A15/z1Vccoow">A15</a>, <a href="/facts/ARM_Cortex-A17/NC6zNRPy">A17</a>, A53, A72), <a href="/facts/Renesas_RX/ujhb9Dcz">Renesas RX</a>, Microchip <a href="/facts/PIC32/NrRJCqHS">PIC32</a>, <a href="/facts/Silicon_Labs/su2Sa5FN">SiLab</a> EFM8, <a href="/facts/RISC-V/pUSKDat1">RISC-V</a>.<a class="footnote-ref" id="fnref:3" href="#fn:3"><sup>3</sup></a> It is also repackaged and sold as an OEM item<a class="footnote-ref" id="fnref:4" href="#fn:4"><sup>4</sup></a> by <a href="/facts/Analog_Devices/xWFzrkre">Analog Devices</a> as the mIDASLink, <a href="/facts/Atmel/kIDF6tmA">Atmel</a> as the SAM-ICE, <a href="/facts/Digi_International/Bz9PWY6o">Digi International</a> as the Digi JTAG Link, and <a href="/facts/IAR_Systems/nKB8KQS4">IAR Systems</a> as the J-Link and the J-Link KS. This is the only JTAG emulator that can add Segger's patented flash breakpoint software to a debugger to enable the setting of multiple <a href="/facts/Breakpoint/LgtYUIlq">breakpoints</a> in flash while running on an ARM device which is typically hindered by the limited availability of hardware breakpoints.<a class="footnote-ref" id="fnref:5" href="#fn:5"><sup>5</sup></a> </p><p>In the following table, the top group are trace devices, the bottom group are educational / hobbyist devices. </p> J-Trace & J-Link Models<a class="footnote-ref" id="fnref:6" href="#fn:6"><sup>6</sup></a><a class="footnote-ref" id="fnref:7" href="#fn:7"><sup>7</sup></a><table><tbody><tr><th>Model</th><th>Host<a href="/facts/USB/XcIKWLyg">USB</a>speed</th><th>Host<a href="/facts/Ethernet_physical_layer/xDwrgGXU">Ethernet</a>speed</th><th>Host<a href="/facts/Wi-Fi/u94quCsx">Wi-Fi</a>type</th><th>Target<a href="/facts/Volt/KF18MXP2">voltage</a>range</th><th>Target Trace<a href="/facts/Pin_header/dnsYKYpn">connector</a>(pins, pitch)</th><th>Target Debug<a href="/facts/Pin_header/dnsYKYpn">connector</a>(pins, pitch)</th><th>Targetdownloadspeed (max)</th><th>Target<a href="/facts/Virtual_COM_port/XI7MuTdA">VCOM</a><a href="/facts/Universal_asynchronous_receiver-transmitter/xMntJcsI">UART</a></th><th>Seggersoftwarefeatures</th><th>Photo </th></tr><tr><td>J-Trace PRO(<i>ARM & RISC-V</i>)</td><td>3.0 SS</td><td>1 <a href="/facts/Gbit/s/Nv9VoT7T">Gbit/s</a></td><td>None</td><td>1.2V to 5V</td><td>19-pins,1.27mm(150 <a href="/facts/MHz/6Wshj5qm">MHz</a>)</td><td>20-pins,2.54mm(50 <a href="/facts/MHz/6Wshj5qm">MHz</a>)</td><td>4 <a href="/facts/MByte/RBF4XpWb">MByte</a>/s</td><td>None</td><td>All</td><td> </td></tr><tr><td>J-Trace PRO Cortex-A/R/M</td><td>3.0 SS</td><td>1 Gbit/s</td><td>None</td><td>1.2V to 5V</td><td>19-pins,1.27mm(150 MHz)</td><td>20-pins,2.54mm(50 MHz)</td><td>4 MByte/s</td><td>None</td><td>All</td><td></td></tr><tr><td>J-Trace PRO Cortex-M</td><td>3.0 SS</td><td>1 Gbit/s</td><td>None</td><td>1.2V to 5V</td><td>19-pins,1.27mm(150 MHz)</td><td>20-pins,2.54mm(50 MHz)</td><td>4 MByte/s</td><td>None</td><td>All</td><td></td></tr><tr><td>J-Trace PRO RISC-V</td><td>3.0 SS</td><td>1 Gbit/s</td><td>None</td><td>1.2V to 5V</td><td>19-pins,1.27mm(150 MHz)</td><td>20-pins,2.54mm(50 MHz)</td><td>4 MByte/s</td><td>None</td><td>All</td><td></td></tr><tr><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr><tr><td>J-Link PRO <a href="/facts/Power_over_Ethernet/m9XQhn3L">PoE</a></td><td>2.0 HS</td><td>100 <a href="/facts/Mbit/s/Nv9VoT7T">Mbit/s</a>(<a href="/facts/Power_over_Ethernet/m9XQhn3L">PoE</a>)</td><td>None</td><td>1.2V to 5V</td><td>None</td><td>20-pins,2.54mm(50 <a href="/facts/MHz/6Wshj5qm">MHz</a>)</td><td>4 MByte/s</td><td>2-pins(<a href="/facts/Baud/uCsmXrdT">10M</a>)</td><td>All</td><td> </td></tr><tr><td>J-Link PRO</td><td>2.0 HS</td><td>100 Mbit/s</td><td>None</td><td>1.2V to 5V</td><td>None</td><td>20-pins,2.54mm(50 MHz)</td><td>4 MByte/s</td><td>2-pins(10M)</td><td>All</td><td></td></tr><tr><td>J-Link ULTRA+</td><td>2.0 HS</td><td>None</td><td>None</td><td>1.2V to 5V</td><td>None</td><td>20-pins,2.54mm(50 MHz)</td><td>4 MByte/s</td><td>2-pins(10M)</td><td>All</td><td></td></tr><tr><td>J-Link <a href="/facts/WiFi/u94quCsx">WiFi</a></td><td>2.0 HS</td><td>None</td><td>802.11b/g/n(2.4<a href="/facts/GHz/6Wshj5qm">GHz</a>)</td><td>1.2V to 5V</td><td>None</td><td>20-pins,2.54mm(15 <a href="/facts/MHz/6Wshj5qm">MHz</a>)</td><td>1 MByte/s</td><td>2-pins(<a href="/facts/Baud/uCsmXrdT">115.2K</a>)</td><td>All</td><td></td></tr><tr><td>J-Link PLUS,J-Link PLUS Compact</td><td>2.0 HS</td><td>None</td><td>None</td><td>1.2V to 5V</td><td>None</td><td>20-pins,2.54mm(15 MHz)</td><td>1 MByte/s</td><td>2-pins(115.2K)</td><td>All</td><td> </td></tr><tr><td>J-Link BASE,J-Link BASE Compact</td><td>2.0 HS</td><td>None</td><td>None</td><td>1.2V to 5V</td><td>None</td><td>20-pins,2.54mm(15 MHz)</td><td>1 MByte/s</td><td>2-pins(115.2K)</td><td>Limited</td><td> </td></tr><tr><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr><tr><td>J-Link EDU(discontinued)</td><td>2.0 HS</td><td>None</td><td>None</td><td>1.2V to 5V</td><td>None</td><td>20-pins,2.54mm(15 <a href="/facts/MHz/6Wshj5qm">MHz</a>)</td><td>1 MByte/s</td><td>2-pins(115.2K)</td><td>Limited</td><td></td></tr><tr><td>J-Link EDU Mini</td><td>2.0 FS</td><td>None</td><td>None</td><td>3.3V</td><td>None</td><td>9-pins,1.27mm(4 MHz)</td><td>0.2 MByte/s</td><td>None</td><td>Limited</td><td></td></tr><tr><td>J-Link OB(<i>on board</i>)</td><td>2.0 FS</td><td>None</td><td>None</td><td>Depends</td><td>None</td><td>Integratedon dev board(2 to 4 MHz)</td><td>0.1 to 0.2MByte/s</td><td>Depends</td><td>Limited</td><td></td></tr></tbody></table> <ul><li>Note: Further models are J-Link LITE ARM, J-Link LITE CortexM, J-Link LITE RX, J-Link OEM.<a class="footnote-ref" id="fnref:8" href="#fn:8"><sup>8</sup></a></li> <li>Note: Software options vary by model: J-Flash, J-Flash-SPI, Ozone, RDDI, RDI, Unlimited Flash Breakponts.</li> <li>Note: The EDU & EDU Mini models cannot be used for commercial software development, also doesn't come with J-Flash, J-Flash-SPI, RDDI, RDI options.</li> <li>Note: Adapters and isolators are available to convert the 20-pin 0.1"/2.54mm <a href="/facts/Pin_header/dnsYKYpn">male shrouded (box) header</a> to another target board connector.<a class="footnote-ref" id="fnref:9" href="#fn:9"><sup>9</sup></a></li> <li>Note: The compact variants are functionally identical to the standard variants</li></ul> <h2 id="see-also">See also</h2> <ul><li><a href="/facts/Embedded_system/a4muX1wU">Embedded system</a></li> <li><a href="/facts/Single-board_microcontroller/oMLzedLU">Single-board microcontroller</a></li> <li><a href="/facts/List_of_ARM_microprocessor_cores/TXgfk7hk">List of ARM microprocessor cores</a></li> <li><a href="/facts/GNU_Debugger/nTs958uC">GNU Debugger</a></li></ul> <h2 id="external-links">External links</h2> Wikimedia Commons has media related to Segger. <ul><li><a href="http://www.segger.com">Official website</a></li></ul> <h2 id="references">References</h2> <ol> <li id="fn:1"><p>"Home Page". Segger. Archived from the original on December 6, 2024. <a href="https://www.segger.com/" target="_blank">https://www.segger.com/</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li> <li id="fn:2"><p>"About Us - The Company". Segger. Archived from the original on December 6, 2024. <a href="https://www.segger.com/about-us/the-company/" target="_blank">https://www.segger.com/about-us/the-company/</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li> <li id="fn:3"><p>Segger J-Link Product Line <a href="http://www.segger.com/cms/development-tools.html" target="_blank">http://www.segger.com/cms/development-tools.html</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li> <li id="fn:4"><p>Advertisement <a href="http://www.edn.com/article/CA6301710.html" target="_blank">http://www.edn.com/article/CA6301710.html</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li> <li id="fn:5"><p>Circuit Cellar - Digital Library - New Product News Archived 2007-03-11 at the Wayback Machine <a href="http://www.circuitcellar.com/library/newproducts/180/segger.htm" target="_blank">http://www.circuitcellar.com/library/newproducts/180/segger.htm</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li> <li id="fn:6"><p>"J-Trace Products". Segger Microcontroller Systems. Archived from the original on October 7, 2024. <a href="https://www.segger.com/products/debug-probes/j-trace/" target="_blank">https://www.segger.com/products/debug-probes/j-trace/</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></p></li> <li id="fn:7"><p>"J-Link Products". Segger Microcontroller Systems. Archived from the original on November 12, 2024. <a href="https://www.segger.com/products/debug-probes/j-link/" target="_blank">https://www.segger.com/products/debug-probes/j-link/</a> <a href="#fnref:7" class="footnote-back-ref">↩</a></p></li> <li id="fn:8"><p>Other J-Links; segger.com <a href="http://www.segger.com/other-j-links.html" target="_blank">http://www.segger.com/other-j-links.html</a> <a href="#fnref:8" class="footnote-back-ref">↩</a></p></li> <li id="fn:9"><p>J-Link adapters and isolators; segger.com <a href="http://www.segger.com/jlink-adapters.html" target="_blank">http://www.segger.com/jlink-adapters.html</a> <a href="#fnref:9" class="footnote-back-ref">↩</a></p></li> </ol>