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Stanford DASH
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<h2 id="references">References</h2> <ol> <li id="fn:1"><p>Lenoski, Daniel; Laudon, James; Gharachorloo, Kourosh; Weber, Wolf-Dietrich; Gupta, Anoop; Hennessy, John; Horowitz, Mark; Lam, Monica S. (1992). "The Stanford Dash Multiprocessor". Computer. 25 (3): 63–79. doi:10.1109/2.121510. S2CID 9731523. <a href="http://dl.acm.org/citation.cfm?id=130562" target="_blank">http://dl.acm.org/citation.cfm?id=130562</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li> <li id="fn:2"><p>Dally, William J.; Seitz, Charles L. (1986). "The torus routing chip". Distributed Computing. 1 (4): 187–196. doi:10.1007/BF01660031. S2CID 10500442. <a href="/wiki/Doi_(identifier)" target="_blank">/wiki/Doi_(identifier)</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li> <li id="fn:3"><p>Lenoski, Daniel; Laudon, James; Gharachorloo, Kourosh; Gupta, Anoop; Hennessy, John (1990). "The directory-based cache coherence protocol for the DASH multiprocessor". Proceedings of the 17th Annual International symposium on Computer Architecture. ACM. pp. 148–159. doi:10.1145/325164.325132. <a href="/wiki/Doi_(identifier)" target="_blank">/wiki/Doi_(identifier)</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li> <li id="fn:4"><p>Gharachorloo, Kourosh; Lenoski, Daniel; Laudon, James; Gibbons, Phillip; Gupta, Anoop; Hennessy, John (1990). "Memory consistency and event ordering in scalable shared-memory multiprocessors". Proceedings of the 17th annual international symposium on Computer Architecture. pp. 15–26. doi:10.1145/325096.325102. <a href="/wiki/Doi_(identifier)" target="_blank">/wiki/Doi_(identifier)</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li> <li id="fn:5"><p>Hennessy, John; Patterson, David (2003). Computer Architecture: A Quantitative Approach (Third ed.). Morgan Kaufmann. pp. 655. ISBN 978-1-558-60596-1. <a href="978-1-558-60596-1" target="_blank">978-1-558-60596-1</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li> <li id="fn:6"><p>Lenoski, Daniel; Laudon, James; Joe, Truman; Nakahira, David; Stevens, Luis; Gupta, Anoop; Hennessy, John (1998). "The DASH prototype: Implementation and Performance". In Sohi, Gurindar (ed.). 25 years of the International Symposia on Computer Architecture (Selected Papers). pp. 418–429. <a href="http://dl.acm.org/citation.cfm?id=285930" target="_blank">http://dl.acm.org/citation.cfm?id=285930</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></p></li> <li id="fn:7"><p>Suzuki, Norihisa (1992). Shared Memory Multiprocessing. The MIT Press. pp. 391–406. ISBN 978-0-262-19322-1. <a href="978-0-262-19322-1" target="_blank">978-0-262-19322-1</a> <a href="#fnref:7" class="footnote-back-ref">↩</a></p></li> <li id="fn:8"><p>Loshin, David (1994). High Performance Computing Demystified. Academic Press. pp. 80, 91. ISBN 978-0-124-55825-0. <a href="978-0-124-55825-0" target="_blank">978-0-124-55825-0</a> <a href="#fnref:8" class="footnote-back-ref">↩</a></p></li> <li id="fn:9"><p>Parhami, Behrooz (1999). Introduction to Parallel Processing: Algorithms and Architectures. Springer. pp. 450–451. ISBN 978-0-306-45970-2. <a href="978-0-306-45970-2" target="_blank">978-0-306-45970-2</a> <a href="#fnref:9" class="footnote-back-ref">↩</a></p></li> <li id="fn:10"><p>Hill, Mark; Jouppi, Norman; Sohi, Gurindar (2000). Readings in Computer Architecture. Morgan Kaufmann. pp. 583–599. ISBN 978-1-55860-539-8. <a href="978-1-55860-539-8" target="_blank">978-1-55860-539-8</a> <a href="#fnref:10" class="footnote-back-ref">↩</a></p></li> <li id="fn:11"><p>Dandamudi, Sivarama (2003). Hierarchical Scheduling in Parallel and Cluster Systems. Series in Computer Science. Springer US. pp. 21–22. doi:10.1007/978-1-4615-0133-6. ISBN 978-1-4613-4938-9. S2CID 46434929. <a href="978-1-4613-4938-9" target="_blank">978-1-4613-4938-9</a> <a href="#fnref:11" class="footnote-back-ref">↩</a></p></li> <li id="fn:12"><p>Institute for Computing Systems Architecture, School of Informatics, University of Edinburgh "Stanford DASH Architecture: Cluster Simulation Model", Retrieved on 3 November 2015. <a href="http://www.icsa.informatics.ed.ac.uk/research/groups/hase/projects/dashclus/index.html" target="_blank">http://www.icsa.informatics.ed.ac.uk/research/groups/hase/projects/dashclus/index.html</a> <a href="#fnref:12" class="footnote-back-ref">↩</a></p></li> <li id="fn:13"><p>Carl Olson and Mattan Erez, The University of Texas at Austin (2007) "The Stanford Dash Multiprocessor", Retrieved on 3 November 2015. <a href="http://users.ece.utexas.edu/~merez/EE382V/lect17.pdf" target="_blank">http://users.ece.utexas.edu/~merez/EE382V/lect17.pdf</a> <a href="#fnref:13" class="footnote-back-ref">↩</a></p></li> <li id="fn:14"><p>Meng Zhang, Duke University (2010) "The Stanford Dash Multiprocessor", Retrieved on 3 November 2015. <a href="http://people.ee.duke.edu/~sorin/ece259/presentations/dash-zhang.pdf" target="_blank">http://people.ee.duke.edu/~sorin/ece259/presentations/dash-zhang.pdf</a> <a href="#fnref:14" class="footnote-back-ref">↩</a></p></li> </ol>