Quad data rate

<h2 id="background">Background</h2>
<p>The reasons for operating in QDR rather than DDR are very different than those cited for operating in DDR rather than single data rate.  Going to DDR allowed manufacturers of memory to send data at the same rate as the clock beat (one data-line transition for every clock-line transition), while SDR could only send data at the rate of the clock cycle (one data-line transition for every clock-line rising edge).  A naive implementation of QDR would result in the data rate being higher than the clock rate, negating any simple electrical advantage.
</p><p>The advantages for QDR arise when dealing with bus contention.  On a modern computer, there may be several CPUs and several <a href="/facts/I/O/WQTE8Jas">I/O</a> devices, all competing for accesses to the memory.  To handle this contention properly, modern systems aim to enable signals to propagate between all connected components within a single clock cycle, while setting a firm limit on the maximum clock rate.  However, once the contention has been dealt with, the data transfer can be treated as a simple point-to-point unidirectional transfer.  In such a simple transfer, it is no longer essential for signals to fully propagate within a cycle; they merely need to arrive coherently, marshaled by a special signal called "strobe".  This reduced requirement on signal integrity allows the QDR data transfer to occur at twice the speed of the clock, as opposed to at the same speed as the clock as in DDR.<a class="footnote-ref" id="fnref:4" href="#fn:4"><sup>4</sup></a>
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<h2 id="see-also">See also</h2>
<ul>
<li>Electronics portal</li></ul>
<ul><li><a href="/facts/Double_data_rate/xqM0kTfk">Double data rate</a></li>
<li><a href="/facts/Pumping_(computer_systems)/gMh4wtI3">Pumping (computer systems)</a></li>
<li><a href="/facts/GDDR5_SDRAM/75cHgpuB">GDDR5X</a></li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>Lee Penrod (2007-08-21). "Understanding System Memory and CPU speeds: A layman's guide to the Front Side Bus (FSB)". directron.com. Archived from the original on 2016-01-18. Retrieved 2015-01-30. <a href="https://web.archive.org/web/20160118134028/http://www.directron.com/fsbguide.html#part3" target="_blank">https://web.archive.org/web/20160118134028/http://www.directron.com/fsbguide.html#part3</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>Lee Penrod (2007-08-21). "Understanding System Memory and CPU speeds: A layman's guide to the Front Side Bus (FSB)". directron.com. Archived from the original on 2016-01-18. Retrieved 2015-01-30. <a href="https://web.archive.org/web/20160118134028/http://www.directron.com/fsbguide.html#part3" target="_blank">https://web.archive.org/web/20160118134028/http://www.directron.com/fsbguide.html#part3</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
<li id="fn:3"><p>Thomas Soderstrom (2006-07-26). "Quad Data Rate Northbridge Technologies (S478, S775)". tomshardware.com. Retrieved 2014-01-09. <a href="http://www.tomshardware.com/reviews/beginners-guide-motherboard-selection,1289-10.html" target="_blank">http://www.tomshardware.com/reviews/beginners-guide-motherboard-selection,1289-10.html</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li>
<li id="fn:4"><p>Intel (2004-10-19). "Patent US6807592". Retrieved 2014-09-08. <a href="https://patents.google.com/patent/US6807592" target="_blank">https://patents.google.com/patent/US6807592</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li>
</ol>

Quad data rate open-in-new

Quad data rate