Current-mode logic

<h2 id="operation">Operation</h2>
<p>The fast operation of CML circuits is mainly due to their lower output voltage swing compared to the static <a href="/facts/CMOS/NJIWYgBl">CMOS</a> circuits, as well as the very fast current switching taking place at the input differential pair transistors. One of the primary requirements of a current-mode logic circuit is that the current bias transistor must remain in the saturation region to maintain a constant current.
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<h2 id="ultra-low-power">Ultra low power</h2>
<p>Recently, CML has been used in ultra-low power applications. Studies show that while the leakage current in conventional static CMOS circuits is becoming a major challenge in lowering the energy dissipation, good control of CML current consumption makes them a very good candidate for extremely low power use. Called subthreshold CML or subthreshold source coupled logic (STSCL),<a class="footnote-ref" id="fnref:3" href="#fn:3"><sup>3</sup></a><a class="footnote-ref" id="fnref:4" href="#fn:4"><sup>4</sup></a><a class="footnote-ref" id="fnref:5" href="#fn:5"><sup>5</sup></a> the current consumption of each gate can be reduced down to a few tens of picoamps.
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<h2 id="see-also">See also</h2>
<ul><li><a href="/facts/Low-voltage_differential_signaling/RsEysH9H">Low-voltage differential signaling</a> (LVDS) A differential standard used primarily for signals between modules.</li>
<li><a href="/facts/Positive-referenced_emitter-coupled_logic/wAN1uEgH">Positive-referenced emitter-coupled logic</a>, a differential signaling standard for high speed inter-module communications</li></ul>

<ul><li>System Interface Level 5 (SxI-5): Common Electrical Characteristics for 2.488 – 3.125 Gbit/s Parallel Interfaces. <a href="/facts/Optical_Internetworking_Forum/C8AJKWPp">OIF</a>, October 2002.</li>
<li>TFI-5: TDM Fabric to Framer Interface Implementation Agreement. OIF, September 16, 2003</li>
<li>Introduction to LVDS, PECL, and CML, Maxim, <a href="https://pdfserv.maximintegrated.com/en/an/AN291.pdf">https://pdfserv.maximintegrated.com/en/an/AN291.pdf</a></li>
<li><a href="http://www.ee.iitm.ac.in/~nagendra/videolectures/doku.php?id=ee685:start">http://www.ee.iitm.ac.in/~nagendra/videolectures/doku.php?id=ee685:start</a></li>
<li>Interfacing between LVPECL, VML, cml and LVDS Levels, <a href="http://focus.ti.com/lit/an/slla120/slla120.pdf">http://focus.ti.com/lit/an/slla120/slla120.pdf</a></li>
<li>For more details on design automation and low power design of CML circuits, see: <a href="http://lsm.epfl.ch">http://lsm.epfl.ch</a></li></ul>
<h2 id="external-links">External links</h2>
<ul><li><a href="http://www.analog.com/static/imported-files/tech_articles/JESD204B-Survival-Guide.pdf">JESD204B - a JEDEC Standard for serial data interfacing</a> - Analog Devices</li>
<li><a href="http://www.ti.com/lit/ml/slap161/slap161.pdf">JESD204B Overview (slides)</a> - Texas Instruments</li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>Serial Interface for Data Converters, JEDEC standard JESD204, April 2006 <a href="/wiki/JEDEC" target="_blank">/wiki/JEDEC</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>"Understanding DVI-D, HDMI And DisplayPort Signals" (PDF). Archived from the original (PDF) on 2 November 2013. Retrieved 30 October 2013. <a href="https://web.archive.org/web/20131102130352/http://www.bicsi.org/pdf/Regions/charlotte_se_4_11/Understanding%20DVI-D,%20HDMI%20and%20Display%20Port%20Signals.pdf" target="_blank">https://web.archive.org/web/20131102130352/http://www.bicsi.org/pdf/Regions/charlotte_se_4_11/Understanding%20DVI-D,%20HDMI%20and%20Display%20Port%20Signals.pdf</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
<li id="fn:3"><p>Tajalli, Armin; Vittoz, Eric; Brauer, Elizabeth J.; Leblebici, Yusuf. "Ultra low power subthreshold MOS current mode logic circuits using a novel load device concept". Esscirc 2007. <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li>
<li id="fn:4"><p>Tajalli, Armin; Leblebici, Yusuf (27 September 2010). Extreme low-power mixed signal IC design: subthreshold source-coupled circuits. Springer, New York. ISBN 978-1-4419-6477-9. <a href="978-1-4419-6477-9" target="_blank">978-1-4419-6477-9</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li>
<li id="fn:5"><p>Reynders, Nele; Dehaene, Wim (2015).  Written at Heverlee, Belgium. Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits. Analog Circuits And Signal Processing (ACSP) (1 ed.). Cham, Switzerland: Springer International Publishing AG Switzerland. doi:10.1007/978-3-319-16136-5. ISBN 978-3-319-16135-8. ISSN 1872-082X. LCCN 2015935431. <a href="978-3-319-16135-8" target="_blank">978-3-319-16135-8</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li>
</ol>

Current-mode logic open-in-new

Current-mode logic