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INT (x86 instruction)
open-in-new
<h2 id="real-mode">Real mode</h2> <p>When generating a <i>software interrupt</i>, the processor calls one of the 256 functions pointed to by the interrupt address table, which is located in the first 1024 bytes of memory while in <a href="/facts/Real_mode/wfU8vfjn">real mode</a> (see <a href="/facts/Interrupt_vector/wq6sxJTo">interrupt vector</a>). It is therefore entirely possible to use a far-call instruction to start the interrupt-function manually after pushing the flag register. </p><p>An example of a useful DOS <i>software interrupt</i> was interrupt 0x21. By calling it with different parameters in the registers (mostly ah and al) you could access various IO operations, string output and more.<a class="footnote-ref" id="fnref:3" href="#fn:3"><sup>3</sup></a> </p><p>Most <a href="/facts/Unix/0pNL2seI">Unix</a> systems and derivatives do not use <i>software interrupts</i>, with the exception of interrupt 0x80, used to make <a href="/facts/System_call/NW44AFJr">system calls</a>. This is accomplished by entering a 32-bit value corresponding to a kernel function into the EAX register of the processor and then executing INT 0x80. </p> <h2 id="int3">INT3</h2> <p>The INT3 instruction is a one-byte-instruction defined for use by <a href="/facts/Debugger/mCe6UsWj">debuggers</a> to temporarily replace an instruction in a running program in order to set a code <a href="/facts/Breakpoint/LgtYUIlq">breakpoint</a>. The more general INT XXh instructions are encoded using two bytes. This makes them unsuitable for use in patching instructions (which can be one byte long); see <a href="/facts/SIGTRAP/IN6VK6r8">SIGTRAP</a>. </p><p>The opcode for INT3 is 0xCC, as opposed to the opcode for INT immediate8, which is 0xCD immediate8. Since the dedicated 0xCC opcode has some desired special properties for debugging, which are not shared by the normal two-byte opcode for an INT3, assemblers do not normally generate the generic 0xCD 0x03 opcode from mnemonics.<a class="footnote-ref" id="fnref:4" href="#fn:4"><sup>4</sup></a> </p> <h2 id="into">INTO</h2> <p>The INTO instruction is another one-byte-instruction. It is a conditional <i>interrupt</i> which is triggered when the overflow flag is set at the time of executing this opcode. This implicitly indicates interrupt #4. </p><p>The opcode for INTO is 0xCE, however it is unavailable in x86-64 mode. </p> <h2 id="see-also">See also</h2> <ul><li><a href="/facts/INT_10H/1YVsnnSd">INT 10H</a></li> <li><a href="/facts/INT_13H/01oMYPbW">INT 13H</a></li> <li><a href="/facts/DOS_API/MTvtV65u">DOS API</a></li> <li><a href="/facts/Interrupt/Mm6C4rpc">Interrupt</a></li> <li><a href="/facts/BIOS_interrupt_call/UThr5YWN">BIOS interrupt call</a></li> <li><a href="/facts/Ralf_Brown%2527s_Interrupt_List/dzYVSXxV">Ralf Brown's Interrupt List</a></li></ul> <h2 id="references">References</h2> <ol> <li id="fn:1"><p>Intel® 64 and IA-32 Architectures Software Developer's Manual (PDF). Vol. 2. Intel Corporation. March 2024. p. 3-520. Retrieved 2024-05-23. <a href="https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf" target="_blank">https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li> <li id="fn:2"><p>Intel® 64 and IA-32 Architectures Software Developer's Manual (PDF). Vol. 2. Intel Corporation. March 2024. p. 3-520. Retrieved 2024-05-23. <a href="https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf" target="_blank">https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li> <li id="fn:3"><p>Definition of: int 21 <a href="https://www.pcmag.com/encyclopedia/term/int-21" target="_blank">https://www.pcmag.com/encyclopedia/term/int-21</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li> <li id="fn:4"><p>Intel® 64 and IA-32 Architectures Software Developer's Manual (PDF). Vol. 2. Intel Corporation. March 2024. p. 3-520. Retrieved 2024-05-23. <a href="https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf" target="_blank">https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li> </ol>