Subthreshold slope

<h2 id="external-links">External links</h2>
<ul><li><a href="http://www.iue.tuwien.ac.at/phd/stockinger/node13.html">Optimization of Ultra-Low-Power CMOS Transistors</a>; Michael Stockinger, 2000</li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>Physics of Semiconductor Devices, S. M. Sze. New York: Wiley, 3rd ed., with Kwok K. Ng, 2007, chapter 6.2.4, p. 315, ISBN 978-0-471-14323-9. <a href="/wiki/ISBN_(identifier)" target="_blank">/wiki/ISBN_(identifier)</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>Auth, C.; Allen, C.; Blattner, A.; Bergstrom, D.; Brazier, M.; Bost, M.; Buehler, M.; Chikarmane, V.; Ghani, T.; Glassman, T.; Grover, R.; Han, W.; Hanken, D.; Hattendorf, M.; Hentges, P.; Heussner, R.; Hicks, J.; Ingerly, D.; Jain, P.; Jaloviar, S.; James, R.; Jones, D.; Jopling, J.; Joshi, S.; Kenyon, C.; Liu, H.; McFadden, R.; McIntyre, B.; Neirynck, J.; Parker, C. (2012). "A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors". 2012 Symposium on VLSI Technology (VLSIT). p. 131. doi:10.1109/VLSIT.2012.6242496. ISBN 978-1-4673-0847-2. S2CID 23675687. <a href="978-1-4673-0847-2" target="_blank">978-1-4673-0847-2</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
</ol>

Subthreshold slope open-in-new

Subthreshold slope