Machine Check Architecture

<h2 id="see-also">See also</h2>
<ul><li><a href="/facts/Machine-check_exception/8aLxkI6W">Machine-check exception</a> (MCE)</li>
<li><a href="/facts/High_availability/y3J8GnEo">High availability</a> (HA)</li>
<li><a href="/facts/Reliability%2c_availability_and_serviceability/alWe5yD1">Reliability, availability and serviceability</a> (RAS)</li>
<li><a href="/facts/Windows_Hardware_Error_Architecture/MpwCW3Fj">Windows Hardware Error Architecture</a> (WHEA)</li></ul>

<h2 id="external-links">External links</h2>
<ul><li><a href="http://www.microsoft.com/whdc/system/platform/64bit/MCAsupport.mspx">Microsoft's article on Itanium's MCA</a></li>
<li><a href="http://www.mcelog.org/">Linux x86 daemon for processing of machine checks</a></li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>"Machine Check Architecture". Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide, Part 2. Intel Corporation. November 2018. <a href="https://www.intel.com/content/www/us/en/content-details/789580/intel-64-and-ia-32-architectures-software-developer-s-manual-volume-3b-system-programming-guide-part-2.html" target="_blank">https://www.intel.com/content/www/us/en/content-details/789580/intel-64-and-ia-32-architectures-software-developer-s-manual-volume-3b-system-programming-guide-part-2.html</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
</ol>

Machine Check Architecture open-in-new

Machine Check Architecture