HyperTransport

HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer <a href="/facts/Processor_(computing)/z3wPljrI">processors</a>. It is a bidirectional <a href="/facts/Serial_communication/r5xP7P1c">serial</a>/<a href="/facts/Parallel_communication/9quqJd8G">parallel</a> high-<a href="/facts/Bandwidth_(computing)/lY6Tb4gX">bandwidth</a>, low-<a href="/facts/Memory_latency/Hp8RD46j">latency</a> <a href="/facts/Point-to-point_link/RmGgN1Pj">point-to-point link</a> that was introduced on April 2, 2001. The <a href="/facts/HyperTransport_Consortium/sDCWBRC5">HyperTransport Consortium</a> is in charge of promoting and developing HyperTransport technology.
HyperTransport is best known as the <a href="/facts/System_bus/p1mxHpbb">system bus</a> architecture of <a href="/facts/AMD/CB1G7QTb">AMD</a> <a href="/facts/Central_processing_unit/Jxp1bqMV">central processing units</a> (CPUs) from <a href="/facts/Athlon_64/3JLpVnQd">Athlon 64</a> through <a href="/facts/AMD_FX/uPMHuACf">AMD FX</a> and the associated <a href="/facts/Motherboard/GXB10heG">motherboard</a> chipsets. HyperTransport has also been used by <a href="/facts/IBM/QszA7nwd">IBM</a> and <a href="/facts/Apple_Inc./oTJYta3k">Apple</a> for the <a href="/facts/Power_Mac_G5/DfREoJlg">Power Mac G5</a> machines, as well as a number of modern <a href="/facts/MIPS_architecture/efV4KgK4">MIPS</a> systems.
The current specification HTX 3.1 remained competitive for 2014 high-speed (2666 and 3200 <a href="/facts/Megatransfer/fgBCc5U9">MT</a>/s or about 10.4 GB/s and 12.8 GB/s) <a href="/facts/DDR4/70r37baX">DDR4</a> RAM and slower (around 1 GB/s <a href="http://www.extremetech.com/computing/175283-sandisk-announces-ulltra-dimms-terabytes-of-low-latency-flash-storage-directly-off-the-ram-channel">[1]</a> similar to high end <a href="/facts/Solid-state_drive/aMHBy8gU">PCIe SSDs</a> <a href="/facts/ULLtraDIMM/M7pV1fDV">ULLtraDIMM</a> flash RAM) technology—a wider range of RAM speeds on a common CPU bus than any Intel <a href="/facts/Front-side_bus/LgYSB7Wl">front-side bus</a>. Intel technologies require each speed range of RAM to have its own interface, resulting in a more complex motherboard layout but with fewer bottlenecks. HTX 3.1 at 26 GB/s can serve as a unified bus for as many as four DDR4 sticks running at the fastest proposed speeds. Beyond that DDR4 RAM may require two or more HTX 3.1 buses diminishing its value as unified transport.

HyperTransport open-in-new

HyperTransport