Delay slot

<p>In <a href="/facts/Computer_architecture/tHtwxgR2">computer architecture</a>, a delay slot is an instruction slot being executed without the effects of a preceding instruction. The most common form is a single arbitrary instruction located immediately after a <a href="/facts/Branch_(computer_science)/obBGrnor">branch</a> <a href="/facts/Instruction_(computer_science)/8p8vwUeE">instruction</a> on a <a href="/facts/RISC/aQbGM62p">RISC</a> or <a href="/facts/Digital_signal_processor/YuBXweos">DSP</a> architecture; this instruction will execute even if the preceding branch is taken. This makes the instruction execute <a href="/facts/Out-of-order_execution/bM0dQM8m">out-of-order</a> compared to its location in the original <a href="/facts/Assembler_language/7XuV0cla">assembler language</a> code.
</p><p>Modern processor designs generally do not use delay slots, and instead perform ever more complex forms of <a href="/facts/Branch_prediction/pGPhFMj5">branch prediction</a>. In these systems, the CPU immediately moves on to what it believes will be the correct side of the branch and thereby eliminates the need for the code to specify some unrelated instruction, which may not always be obvious at compile-time. If the assumption is wrong, and the other side of the branch has to be called, this can introduce a lengthy delay. This occurs rarely enough that the speed up of avoiding the delay slot is easily made up by the smaller number of wrong decisions.
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Delay slot open-in-new

Delay slot