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Cannon Lake (microprocessor)
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<p>Cannon Lake is <a href="/facts/List_of_Intel_codenames/bHsKcU7u">Intel's codename</a> for the 9th generation of <a href="/facts/Intel_Core/lwa8VSdT">Core</a> processors based on Palm Cove, a <a href="/facts/10_nm_process/h5qaJnz9">10 nm</a> <a href="/facts/Die_shrink/fgJ8nL4b">die shrink</a> of the <a href="/facts/Kaby_Lake/DbfMWB0T">Kaby Lake</a> <a href="/facts/Microarchitecture/NFRd4NUL">microarchitecture</a>. As a die shrink, Palm Cove is a new <i>process</i> in Intel's <a href="/facts/Process%E2%80%93architecture%E2%80%93optimization_model/j4BM5X5r">process-architecture-optimization</a> execution plan as the next step in semiconductor fabrication. Cannon Lake CPUs are the first mainstream CPUs to include the <a href="/facts/AVX-512/2KpGqI8t">AVX-512</a> instruction set. </p><p>Prior to Cannon Lake's launch, Intel launched another 14 nm process refinement with the codename <a href="/facts/Coffee_Lake/oASqYsf2">Coffee Lake</a>. </p><p>The successor of Cannon Lake is <a href="/facts/Ice_Lake_(microarchitecture)/ezzrBUW5">Ice Lake</a>, powered by the <a href="/facts/Sunny_Cove_(microarchitecture)/fhm3twoD">Sunny Cove microarchitecture</a>, which represents the <i>architecture</i> phase in the <i>process-architecture-optimization</i> model. </p>