VHDL-AMS

VHDL-AMS is a derivative of the <a href="/facts/Hardware_description_language/g19KvKCu">hardware description language</a> <a href="/facts/VHDL/H6Exdjfs">VHDL</a> (IEEE 1076-2002). It includes analog and mixed-signal extensions (AMS) in order to define the behavior of analog and mixed-signal systems (IEEE 1076.1-2017).
The VHDL-AMS standard was created with the intent of enabling designers of analog and mixed signal systems and integrated circuits to create and use modules that encapsulate high-level behavioral descriptions as well as structural descriptions of systems and components.
VHDL-AMS is an industry standard modeling language for mixed signal circuits. It provides both continuous-time and event-driven modeling semantics, and so is suitable for analog, digital, and mixed analog/digital circuits. It is particularly well suited for verification of very complex analog, mixed-signal and <a href="/facts/Radio_frequency/aWku7h4R">radio frequency</a> integrated circuits.

VHDL-AMS open-in-new

VHDL-AMS