DDR SDRAM

Double Data Rate Synchronous Dynamic Random-Access Memory (DDR SDRAM) is a <a href="/facts/Double_data_rate/xqM0kTfk">double data rate</a> (DDR) <a href="/facts/Synchronous_dynamic_random-access_memory/regKJe8M">synchronous dynamic random-access memory</a> (SDRAM) class of memory <a href="/facts/Integrated_circuit/fjn6vg7C">integrated circuits</a> used in <a href="/facts/Computer/SQe1aK05">computers</a>. DDR SDRAM, also retroactively called DDR1 SDRAM, has been superseded by <a href="/facts/DDR2_SDRAM/DqSMKcPB">DDR2 SDRAM</a>, <a href="/facts/DDR3_SDRAM/1R1CTNv3">DDR3 SDRAM</a>, <a href="/facts/DDR4_SDRAM/70r37baX">DDR4 SDRAM</a> and <a href="/facts/DDR5_SDRAM/N3XSGE40">DDR5 SDRAM</a>. None of its successors are <a href="/facts/Forward_compatibility/EvGkMPCm">forward</a> or <a href="/facts/Backward_compatibility/FbHFBu5y">backward compatible</a> with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 <a href="/facts/Memory_module/sNTAYwr3">memory modules</a> will not work on DDR1-equipped <a href="/facts/Motherboard/GXB10heG">motherboards</a>, and vice versa.
Compared to single data rate (<a href="/facts/Synchronous_dynamic_random-access_memory/regKJe8M">SDR</a>) SDRAM, the DDR SDRAM <a href="/facts/External_memory_interface/4PXYFUaP">interface</a> makes higher transfer rates possible through more strict control of the timing of the electrical data and clock signals. Implementations often have to use schemes such as <a href="/facts/Phase-locked_loop/sgmca8aQ">phase-locked loops</a> and self-calibration to reach the required timing accuracy. The interface uses <a href="/facts/Double_data_rate/xqM0kTfk">double pumping</a> (transferring data on both the rising and falling edges of the <a href="/facts/Clock_signal/9UfTzGHx">clock signal</a>) to double <a href="/facts/Data_bus/R45TKwS7">data bus</a> bandwidth without a corresponding increase in clock frequency. One advantage of keeping the clock frequency low is that it reduces the <a href="/facts/Signal_integrity/cqL8SVHd">signal integrity</a> requirements on the circuit board connecting the memory to the controller. The name "double data rate" refers to the fact that a DDR SDRAM with a certain clock frequency achieves nearly twice the <a href="/facts/Bandwidth_(computing)/lY6Tb4gX">bandwidth</a> of a SDR SDRAM running at the same clock frequency, due to this double pumping.
With data being transferred 64 <a href="/facts/Bit/S972NSaD">bits</a> at a time, DDR SDRAM gives a transfer rate (in bytes/s) of (memory bus clock rate) × 2 (for dual rate) × 64 (number of bits transferred) / 8 (number of bits/byte). Thus, with a bus frequency of 100 MHz, DDR SDRAM gives a maximum transfer rate of 1600 <a href="/facts/MB%2fs/Nv9VoT7T">MB/s</a>.

DDR SDRAM open-in-new

DDR SDRAM