Multistage interconnection networks

<p>Multistage interconnection networks (MINs) are a class of high-speed <a href="/facts/Computer_network/3w5RM99p">computer networks</a> usually composed of <a href="/facts/Central_processing_unit/Jxp1bqMV">processing</a> elements (PEs) on one end of the network and <a href="/facts/Computer_memory/hQKVQ51J">memory</a> elements (MEs) on the other end, connected by <a href="/facts/Network_switch/CnvmhNYT">switching</a> elements (SEs).  The switching elements themselves are usually connected to each other in stages, hence the name.
</p><p>MINs are typically used in high-performance or <a href="/facts/Parallel_computing/nQzcpzQt">parallel computing</a> as a low-<a href="/facts/Network_latency/6Bjhn30H">latency</a> interconnection (as opposed to traditional <a href="/facts/Packet_switching/olDlDP1R">packet switching</a> networks), though they could be implemented on top of a packet switching network.  Though the network is typically used for routing purposes, it could also be used as a co-processor to the actual processors for such uses as <a href="/facts/Sorting/olGzsItY">sorting</a>; <a href="/facts/Circular_shift/noSNJs87">cyclic shifting</a>, as in a <a href="/facts/Faro_shuffle/Sfj8lSAW">perfect shuffle</a> network; and <a href="/facts/Bitonic_sorting/MdYdIbQV">bitonic sorting</a>.
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Multistage interconnection networks open-in-new

Multistage interconnection networks