Interleaved memory

<p>In <a href="/facts/Computing/Kghtm9fX">computing</a>, interleaved memory is a design which compensates for the relatively slow <a href="/facts/Speed/I3qgMPfs">speed</a> of <a href="/facts/Dynamic_random-access_memory/koI9FGo5">dynamic random-access memory</a> (DRAM) or <a href="/facts/Core_memory/4TFIXSNd">core memory</a>, by spreading memory addresses evenly across <a href="/facts/Memory_bank/FWIyfquw">memory banks</a>.  That way, contiguous memory reads and writes use each memory bank in turn, resulting in higher memory throughput due to reduced waiting for memory banks to become ready for the operations.
</p><p>It is different from <a href="/facts/Multi-channel_memory_architecture/2XQeG01g">multi-channel memory architectures</a>, primarily as interleaved memory does not add more channels between the <a href="/facts/Main_memory/wPHKFpdx">main memory</a> and the <a href="/facts/Memory_controller/tHq2zlws">memory controller</a>.  However, channel interleaving is also possible, for example in freescale <a href="/facts/I.MX/vy54xSxs">i.MX</a>6 processors, which allow interleaving to be done between two channels.
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Interleaved memory open-in-new

Interleaved memory