Current-mode logic

Current mode logic (CML), or source-coupled logic (SCL), is a digital design style used both for <a href="/facts/Logic_family/QlEgIecX">logic gates</a> and for <a href="/facts/Printed_circuit_board/muSR2p43">board</a>-level digital signaling of digital data.
The basic principle of CML is that <a href="/facts/Electric_current/Dc1xdnUX">current</a> from a <a href="/facts/Current_source/1UkYH0aG">constant current generator</a> is steered between two alternate paths depending on whether a logic zero or logic one is being represented. Typically, the generator is connected to the two sources of a pair of differential <a href="/facts/Field-effect_transistor/TerYC6Nz">FETs</a>, with the two paths being their two drains. The <a href="/facts/Bipolar_junction_transistor/9BMcGv5Q">bipolar</a> equivalent <a href="/facts/Emitter-coupled_logic/wAN1uEgH">emitter-coupled logic</a> (ECL) operates in a contrasting fashion, still differential but with the output being taken from the emitters of the BJT transistors (rather than the collectors, which would be analogous to the drains of the FETs).
As a <a href="/facts/Differential_signaling/jusjFQKo">differential</a> <a href="/facts/Printed_circuit_board/muSR2p43">PCB</a>-level interconnect, it is intended to transmit data at speeds between 312.5 <a href="/facts/Bit%2fs/ppUNMmVd">Mbit/s</a> and 3.125 Gbit/s across standard <a href="/facts/Printed_circuit_board/muSR2p43">printed circuit boards</a>.

The transmission is point-to-point, unidirectional, and is usually <a href="/facts/Electrical_termination/MatLrePo">terminated</a> at the destination with 50 <a href="/facts/Ohm/QNVrlGjw">Ω</a> <a href="/facts/Resistor/JrsGReM6">resistors</a> to <a href="/facts/IC_power_supply_pin/moPAAjnl">Vcc</a> on both differential lines. CML is frequently used in interfaces to fiber optic components. The difference of principal between CML and <a href="/facts/Emitter-coupled_logic/wAN1uEgH">ECL</a> as a link technology is the <a href="/facts/Output_impedance/80brK3Cv">output impedance</a> of the driver stage: the <a href="/facts/Emitter_follower/kL82QNn2">emitter follower</a> of ECL has a low resistance of around 5 Ω whereas CML connects to the drains of the driving transistors, that have a high impedance, and so the <a href="/facts/Electrical_impedance/I06NSXtN">impedance</a> of the <a href="/facts/Pull-up_resistor/zeEjjrqk">pull up/down</a> network (typically 50 Ω resistive) is the effective output impedance. <a href="/facts/Impedance_matching/0mdy9TAp">Matching</a> this drive impedance close to the driven <a href="/facts/Transmission_line/cYlqaPo3">transmission line</a>'s <a href="/facts/Characteristic_impedance/oUg0mhah">characteristic impedance</a> greatly reduces undesirable ringing.
CML signals have also been found useful for connections between modules. CML is the <a href="/facts/Physical_layer/WuATCrVw">physical layer</a> used in <a href="/facts/Digital_Visual_Interface/Dpnu9JmB">DVI</a>, <a href="/facts/HDMI/HuNwzm04">HDMI</a> and <a href="/facts/FPD-Link/IUs0RIsG">FPD-Link III</a> video links, the interfaces between a <a href="/facts/Display_controller/ISm9E6Nc">display controller</a> and a <a href="/facts/Computer_monitor/NRaTDFHc">monitor</a>.
In addition, CML has been widely used in high-speed integrated systems, such as for <a href="/facts/Serial_communication/r5xP7P1c">serial data</a> <a href="/facts/Transceiver/S6HSzRPf">transceivers</a> and <a href="/facts/Frequency_synthesizer/bsPnGKdr">frequency synthesizers</a> in <a href="/facts/Telecommunications/vxoj1cxR">telecommunication</a> systems.

Current-mode logic open-in-new

Current-mode logic