UNIVAC LARC

The <a href="/facts/UNIVAC/FhJlhtva">UNIVAC</a> LARC, short for the Livermore Advanced Research Computer, is a <a href="/facts/Mainframe_computer/nrBR6rWa">mainframe computer</a> designed to a requirement published by <a href="/facts/Edward_Teller/9g3Mr9Mp">Edward Teller</a> in order to run <a href="/facts/Hydrodynamic/y7uzSCfg">hydrodynamic</a> simulations for <a href="/facts/Nuclear_weapon/QVdBcMdm">nuclear weapon</a> design. It was one of the earliest <a href="/facts/Supercomputer/HT9NwGAN">supercomputers</a>. It used <a href="/facts/Solid-state_electronics/US0Qbq28">solid-state electronics</a>.
The LARC architecture supported <a href="/facts/Multiprocessing/aDCfehDQ">multiprocessing</a> with two <a href="/facts/Central_processing_unit/Jxp1bqMV">CPUs</a> (called Computers) and an <a href="/facts/Input%2foutput/WQTE8Jas">input/output</a> (I/O) Processor (called the Processor). Two LARC machines were built, the first delivered to <a href="/facts/Lawrence_Livermore_National_Laboratory/WuXIbIKz">Livermore</a> in June 1960, and the second to the Navy's <a href="/facts/David_Taylor_Model_Basin/Aqpms439">David Taylor Model Basin</a>. Both examples had only one CPU, so no multiprocessor LARCs were ever built. Livermore decommissioned their LARC in December 1968 and the Navy's LARC was turned off in April 1969.
The LARC CPUs were able to perform addition in about 4 microseconds, corresponding to about 250 kIPS speed. This made it the fastest computer in the world until 1962 when the <a href="/facts/IBM_7030_Stretch/V8SdUp00">IBM 7030 Stretch</a> took the title. The 7030 started as <a href="/facts/IBM/QszA7nwd">IBM</a>'s entry to the LARC contest, but Teller chose the simpler Univac over the riskier IBM design.

UNIVAC LARC open-in-new

UNIVAC LARC