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Nios II
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<p>Nios II is a <a href="/facts/32-bit/TDMVce8s">32-bit</a> embedded processor architecture designed specifically for the <a href="/facts/Altera/66c0Gh0R">Altera</a> family of <a href="/facts/Field-programmable_gate_array/M8LSGcAU">field-programmable gate array</a> (FPGA) <a href="/facts/Integrated_circuit/fjn6vg7C">integrated circuits</a>. Nios II incorporates many enhancements over the original Nios architecture, making it more suitable for a wider range of embedded computing applications, from <a href="/facts/Digital_signal_processing/PEG7azr8">digital signal processing</a> (DSP) to system-control. </p><p>Nios II is a successor to Altera's first configurable <a href="/facts/16-bit/bTGS44Ne">16-bit</a> embedded processor <a href="/facts/Nios_embedded_processor/MelW9MsJ">Nios</a>, introduced in 2000. </p><p>Intel announced the discontinuation of Nios II in 2023, with its successor being Nios V, based on the <a href="/facts/RISC-V/pUSKDat1">RISC-V</a> architecture. </p>