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Program status word

Control register in IBM System/360 and successors systems architecture

The program status word (PSW) is a register that performs the function of a status register and program counter, and sometimes more. The term is also applied to a copy of the PSW in storage. This article only discusses the PSW in the IBM System/360 and its successors, and follows the IBM convention of numbering bits starting with 0 as the leftmost (most significant) bit.

Although certain fields within the PSW may be tested or set by using non-privileged instructions, testing or setting the remaining fields may only be accomplished by using privileged instructions.

Contained within the PSW are the two bit condition code, representing zero, positive, negative, overflow, and similar flags of other architectures' status registers. Conditional branch instructions test this encoded as a four bit value, with each bit representing a test of one of the four condition code values, 23 + 22 + 21 + 20. (Since IBM uses big-endian bit numbering, mask value 8 selects code 0, mask value 4 selects code 1, mask value 2 selects code 2, and mask value 1 selects code 3.)

The 64-bit PSW describes (among other things)

Interrupt masks
Privilege states
Condition code
Instruction address

In the early instances of the architecture (System/360 and early System/370), the instruction address was 24 bits; in later instances (XA/370), the instruction address was 31 bits plus a mode bit (24 bit addressing mode if zero; 31 bit addressing mode if one) for a total of 32 bits.

In the present instances of the architecture (z/Architecture), the instruction address is 64 bits and the PSW itself is 128 bits.

The PSW may be loaded by the LOAD PSW instruction (LPSW or LPSWE). Its contents may be examined with the Extract PSW instruction (EPSW).

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Format

S/360

On all but 360/20,⁹ the PSW has the following formats. S/360 Extended PSW format only applies to the 360/67 with bit 8 of control register 6 set.

IBM S/360 PSW formats

S/360 Standard PSW¹⁰

System Mask

Key

Interruption Code¹¹

ILC

ProgramMask

Instruction Address

S/360 Standard PSW abbreviations

Bits

Field

Meaning

0-7

System Mask

Bit	Meaning
0	Channel 0 mask
1	Channel 1 mask
2	Channel 2 mask
3	Channel 3 mask
4	Channel 4 mask
5	Channel 5 mask
6	Channel 6 mask
7	External Mask

8-11

Key

PSW key

ASCII

Machine-check mask

Wait state

Problem state

16-31

Interruption Code¹²

32-33

ILC

Instruction-Length Code¹³

34-35

Condition Code

36-39

Program Mask

Bit	Meaning
36	Fixed-point overflow
37	Decimal overflow
38	Exponent underflow
39	Significance

40-63

Instruction Address

S/360 Extended PSW¹⁴

spare

24/32BitMode

TranCtrl

I/OMask

Ext.Mask

Key

ILC

ProgramMask

spare

Instruction Address

S/360 Extended PSW abbreviations

Bits

Field

Meaning

0-3

Spare (must be 0)

24/32-bit Address mode

Translation Control

I/O Mask (Summary)

External Mask (Summary)

8-11

Key

Protection Key

ASCII

Machine-check mask

Wait state

Problem state

16-17

ILC

Instruction-Length Code¹⁵

18-19

Condition Code

20-23

Program Mask

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	Exponent underflow
23	Significance

24-31

Spare

32-63

Instruction Address

S/370

IBM S/370 PSW formats

S/370 Basic Control mode PSW[17]

Chan.Mask

Key

Interruption Code

ILC

ProgramMask

Instruction Address

S/370 BC mode PSW abbreviations

Bits

Field

Meaning

0-5

Channel Masks for channels 0-5

I/O Mask for channels > 5

External Mask

8-11

Key

PSW key

E=0

Basic Control mode

Machine-check mask

Wait state

Problem state

16-31

Interruption Code[18]

32-33

ILC

Instruction-Length Code[19]

34-35

Condition Code

36-39

Program Mask

Bit	Meaning
36	Fixed-point overflow
37	Decimal overflow
38	Exponent underflow
39	Significance

40-63

Instruction Address

S/370 Extended Control mode PSW[20]

Key

ProgramMask

Instruction Address

S/370 EC mode PSW abbreviations

Bits

Field

Meaning

PER Mask

DAT mode

I/O Mask; subject to channel mask in CR2

External Mask; subject to external subclass mask in CR0

8-11

Key

PSW key

E=1

Extended Control mode

Machine-check mask

Wait state

Problem state

Address-Space Control0=primary-space mode1=Secondary-space mode

18-19

Condition Code

20-23

Program Mask

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	Exponent underflow
23	Significance

40-63

Instruction Address

S/370 Extended Architecture (S/370-XA)

IBM Extended Architecture (XA) PSW format

Extended Architecture Extended Control mode PSW¹⁶

Key

ProgramMask

Instruction Address

S/370-XA EC mode PSW abbreviations

Bits

Field

Meaning

PER Mask

DAT mode

I/O Mask; subject to channel mask in CR2

External Mask; subject to external subclass mask in CR0

8-11

Key

PSW key

E=1

Extended Control mode

Machine-check mask

Wait state

Problem state

Address-Space Control0=primary-space mode1=Secondary-space mode

18-19

Condition Code

20-23

Program Mask

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	Exponent underflow
23	Significance

Addressing mode0=24 bit; 1=31 bit

33-63

Instruction Address

Enterprise Systems Architecture (ESA)

IBM Enterprise Systems Architecture (ESA) PSW format

Enterprise Systems Architecture Extended Control mode PSW¹⁷ ¹⁸

Key

ProgramMask

Instruction Address

ESA EC mode PSW abbreviations

Bits

Field

Meaning

PER Mask

DAT mode

I/O Mask; subject to channel mask in CR2

External Mask; subject to external subclass mask in CR0

8-11

Key

PSW key

E=1

Extended Control mode

Machine-check mask

Wait state

Problem state

16-17

Address-Space Control00=primary-space mode01=Access-register mode10=Secondary-space mode11=Home-space mode

18-19

Condition Code

20-23

Program Mask

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	Exponent underflow¹⁹
23	Significance²⁰

Addressing mode0=24 bit; 1=31 bit

33-63

Instruction Address

z/Architecture

IBM z/Architecture PSW formats

z/Architecture long PSW²¹

Key

ProgramMask

Instruction Address

Instruction Address (Continued)

127

Long PSW abbreviations

Bits

Field

Meaning

PER Mask

DAT mode

I/O mask

External Mask

8-11

Key

PSW key

E=0

Must be zero for LPSWE

Machine-check mask

Wait state

Problem state

16-17

Address-Space Control00=primary-space mode01=Access-register mode10=Secondary-space mode11=Home-space mode

18-19

Condition Code

20-23

Program Mask

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	HFP Exponent underflow
23	HFP Significance

Reserved for IBM

Extended Addressing mode0=defined by BA below; 1=64-bit, BA must be zero

Basic Addressing mode0=24 or 64; 1=31

64-127

Instruction Address

z/Architecture short PSW²²

Key

ProgramMask

Instruction Address

Short PSW abbreviations

Bits

Field

Meaning

PER Mask

DAT mode

I/O mask

External Mask

8-11

Key

PSW key

E=1

Must be one for LPSW

Machine-check mask

Wait state

Problem state

16-17

Address-Space Control00=primary-space mode01=Access-register mode10=Secondary-space mode11=Home-space mode

18-19

Condition Code

20-23

Program Mask

Bit	Meaning
20	Fixed-point overflow
21	Decimal overflow
22	HFP Exponent underflow
23	HFP Significance

Reserved for IBM

Extended Addressing mode0=defined by BA below; 1=64-bit, BA must be zero

Basic Addressing mode0=24 or 64; 1=31

33-63

Instruction Address

Notes

S360 IBM System/360 Principles of Operation (PDF) (Eighth ed.). IBM. September 1968. A22-6821-7. func67 IBM System/360 Model 67 Functional Characteristics (PDF) (Third ed.). IBM. February 1972. GA27-2719-2. S370 IBM System/370 Principles of Operation (PDF) (Eleventh ed.). IBM. September 1987. A22-7000-10. S370-XA IBM System/370 Extended Architecture Principles of Operation (PDF) (Second ed.). IBM. January 1987. SA22-7085-1. S370-ESA IBM Enterprise Systems Architecture/370 Principles of Operation (PDF) (First ed.). IBM. August 1988. SA22-7200-0. z z/Architecture Principles of Operation (PDF) (Fourteenth ed.). IBM. May 2022. SA22-7832-13.

References

The nomenclature varies among architectures. ↩
S360. - IBM System/360 Principles of Operation (PDF) (Eighth ed.). IBM. September 1968. A22-6821-7. http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf ↩
S370. - IBM System/370 Principles of Operation (PDF) (Eleventh ed.). IBM. September 1987. A22-7000-10. http://bitsavers.org/pdf/ibm/370/princOps/GA22-7000-10_370_Principles_of_Operation_Sep87.pdf ↩
S370-XA. - IBM System/370 Extended Architecture Principles of Operation (PDF) (Second ed.). IBM. January 1987. SA22-7085-1. http://bitsavers.org/pdf/ibm/370/princOps/SA22-7085-1_370-XA_Principles_of_Operation_Jan87.pdf ↩
S370-ESA. - IBM Enterprise Systems Architecture/370 Principles of Operation (PDF) (First ed.). IBM. August 1988. SA22-7200-0. http://bitsavers.org/pdf/ibm/370/princOps/SA22-7200-0_370-ESA_Principles_of_Operation_Aug88.pdf ↩
S390-ESA. sfn error: no target: CITEREFS390-ESA (help) ↩
z. - z/Architecture Principles of Operation (PDF) (Fourteenth ed.). IBM. May 2022. SA22-7832-13. https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf ↩
However, a 360/67[7] equipped with the Extended Dynamic Address Translation[8] feature has a 32-bit mode selected by bit 4 of the PSW[9] in Extended PSW mode[8] (Control Register 6, bit 8[10]). /wiki/IBM_System/360_Model_67 ↩
Despite the name, the 350/20 does not adhere to the S/360 architecture. ↩
S360, p. 15, Program Status Word. - IBM System/360 Principles of Operation (PDF) (Eighth ed.). IBM. September 1968. A22-6821-7. http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf ↩
S360, pp. 15–16, Interruption. - IBM System/360 Principles of Operation (PDF) (Eighth ed.). IBM. September 1968. A22-6821-7. http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf ↩
S370, pp. 15–16, Interruption. - IBM System/370 Principles of Operation (PDF) (Eleventh ed.). IBM. September 1987. A22-7000-10. http://bitsavers.org/pdf/ibm/370/princOps/GA22-7000-10_370_Principles_of_Operation_Sep87.pdf ↩
S370, p. 156, Instruction-Length Code. - IBM System/370 Principles of Operation (PDF) (Eleventh ed.). IBM. September 1987. A22-7000-10. http://bitsavers.org/pdf/ibm/370/princOps/GA22-7000-10_370_Principles_of_Operation_Sep87.pdf ↩
func67, pp. 15–16, Instruction Fetching and Execution. - IBM System/360 Model 67 Functional Characteristics (PDF) (Third ed.). IBM. February 1972. GA27-2719-2. http://bitsavers.org/pdf/ibm/360/functional_characteristics/GA27-2719-2_360-67_funcChar.pdf ↩
S360, p. 156, Instruction-Length Code. - IBM System/360 Principles of Operation (PDF) (Eighth ed.). IBM. September 1968. A22-6821-7. http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf ↩
S370-XA, p. 4-5, Program-Status-Word Format. - IBM System/370 Extended Architecture Principles of Operation (PDF) (Second ed.). IBM. January 1987. SA22-7085-1. http://bitsavers.org/pdf/ibm/370/princOps/SA22-7085-1_370-XA_Principles_of_Operation_Jan87.pdf ↩
S370-ESA, p. 4-5, Program-Status-Word Format. - IBM Enterprise Systems Architecture/370 Principles of Operation (PDF) (First ed.). IBM. August 1988. SA22-7200-0. http://bitsavers.org/pdf/ibm/370/princOps/SA22-7200-0_370-ESA_Principles_of_Operation_Aug88.pdf ↩
S390-ESA, p. 4-5, Program-Status-Word Format. sfn error: no target: CITEREFS390-ESA (help) ↩
Bit 22 is renamed as HFP exponent underflow in ESA/390 ↩
Bit 23 is renamed as HFP significance in ESA/390 ↩
z, pp. 4-5–4-8, Program-Status-Word Format. - z/Architecture Principles of Operation (PDF) (Fourteenth ed.). IBM. May 2022. SA22-7832-13. https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf ↩
z, p. 4-8, Short PSW Format. - z/Architecture Principles of Operation (PDF) (Fourteenth ed.). IBM. May 2022. SA22-7832-13. https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf ↩