In computer chip design and manufacture VHDL-VITAL or simply VITAL, VHDL Initiative Towards ASIC Libraries, refers to the IEEE Standard 1076.4 Timing.
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References
"VHDL - VITAL". www.vhdl.renerta.com. Archived from the original on 2011-10-22. https://web.archive.org/web/20111022082340/http://www.vhdl.renerta.com/mobile/source/vhd00080.htm ↩