Flat memory model

<h2 id="memory-models">Memory models</h2>

<p class="note">Main article: <a href="/facts/Memory_model_(addressing_scheme)/7EsUmbea">Memory model</a></p>
<p>Most modern memory models fall into one of three categories:
</p>
<h3>Flat unpaged memory model</h3>
<ul><li>Simple interface for programmers, clean design</li>
<li>Greatest flexibility due to uniform access speed (segmented memory page switches usually incur varied latency due to longer accesses of other pages, either due to extra CPU logic in changing page, or hardware requirements)</li>
<li>Minimum hardware and CPU real estate for simple controller applications</li>
<li>Maximum execution speed, as there is no need to access auxiliary data structures such as a segment or page table in <a href="/facts/RAM/DuD4bxh6">RAM</a></li>
<li>Not suitable for general computing or multitasking operating systems</li></ul>
<h3>Paged memory model</h3>
<p class="note">Main article: <a href="/facts/Paging/KR889x5k">Paging</a></p>
<ul><li>Suitable for multitasking, general operating system design, resource protection and allocation</li>
<li>Suitable for virtual memory implementation</li>
<li>More CPU real estate, somewhat lower speed</li>
<li>More complex to program</li>
<li>Rigid page boundaries, not always the most memory efficient</li>
<li>This memory model is required when using <a href="/facts/Physical_Address_Extension/aEr4tj4x">Physical Address Extension</a> (PAE) in <a href="/facts/Pentium_Pro/mTAN64fo">Pentium Pro</a> and later x86 CPUs to support 36-bit physical addresses to address more than 4GB of physical memory.</li></ul>
<h3>x86 segmented memory model</h3>
<p class="note">Main articles: <a href="/facts/Memory_segmentation/QCUGw5v5">Memory segmentation</a> and <a href="/facts/X86_memory_models/GrELuul0">x86 memory models</a></p>
<ul><li>Similar to paged memory, but paging is achieved by the implicit addition of two relatively shifted registers: segment:offset</li>
<li>Variable page boundaries, more efficient and flexible than the paged memory model</li>
<li>Quite complex and awkward from a programmer's point of view</li>
<li>More difficult for compilers</li>
<li>Pages can overlap / poor resource protection and isolation</li>
<li>Many to one address translation correspondence: Many segment:offset combinations resolve to the same physical address</li>
<li>Greater chance of programming errors</li>
<li>Implemented in the original Intel 8086, <a href="/facts/8088/DdWKfyBp">8088</a>, <a href="/facts/80186/jUjWLMEX">80186</a>, <a href="/facts/80286/rucEU93g">80286</a>, and supported by <a href="/facts/80386/ag5eSgWv">80386</a> and all subsequent <a href="/facts/X86/Kypq5fgu">x86</a> machines through to present day <a href="/facts/Pentium/czINY469">Pentium</a> and <a href="/facts/Core_2/9gJP9o8p">Core 2</a> processors. This memory model has remained ever since in the x86 machines, which now provide multi-mode operation and rarely operate in the compatible segmented mode. See <a href="/facts/X86_memory_segmentation/7yD0VGfy">x86 memory segmentation</a> for details.</li>
<li>saves RAM by moving the segment address, this allows short jumps that require fewer bytes.</li></ul>
<p>Within the x86 architectures, when operating in the <a href="/facts/Real_mode/wfU8vfjn">real mode</a> (or emulation), physical address is computed as:<a class="footnote-ref" id="fnref:2" href="#fn:2"><sup>2</sup></a>
</p>
Address = 16 × segment + offset
<p>(I.e., the 16-bit segment register is shifted left by 4 bits and added to a 16-bit offset, resulting in a 20-bit address.)
</p>
<h2 id="see-also">See also</h2>
<ul><li><a href="/facts/Address_space/EscyYKkP">Address space</a></li>
<li><a href="/facts/Memory_model_(disambiguation)/4hfNIvbJ">Memory model (disambiguation)</a></li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>Gonzalez, Antonio; Latorre, Fernando; Magklis, Grigorios (2011). Processor Microarchitecture: An Implementation Perspective. Morgan & Claypool Publishers. p. 72. ISBN 9781608454525. <a href="9781608454525" target="_blank">9781608454525</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>General description of Real Mode "The physical address can be calculated as Value_in_segment_register
16 + Value_in_offset_register."
 <a href="http://www.deinmeister.de/x86modes.htm" target="_blank">http://www.deinmeister.de/x86modes.htm</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
</ol>

Flat memory model open-in-new

Flat memory model