64-bit computing

<h2 id="architectural-implications">Architectural implications</h2>

Processor registers are typically divided into several groups: integer, floating-point, <a href="/facts/Single_instruction%2c_multiple_data/gQHWQSpo">single instruction, multiple data</a> (SIMD), control, and often special registers for address arithmetic which may have various uses and names such as address, index, or base registers. However, in modern designs, these functions are often performed by more general purpose integer registers. In most processors, only integer or address-registers can be used to address data in memory; the other types of registers cannot. The size of these registers therefore normally limits the amount of directly addressable memory, even if there are registers, such as floating-point registers, that are wider.
Most high performance 32-bit and 64-bit processors (some notable exceptions are older or embedded <a href="/facts/ARM_architecture/SALsYA79">ARM architecture</a> (ARM) and 32-bit <a href="/facts/MIPS_architecture/efV4KgK4">MIPS architecture</a> (MIPS) CPUs) have integrated floating point hardware, which is often, but not always, based on 64-bit units of data. For example, although the <a href="/facts/X86/Kypq5fgu">x86</a>/<a href="/facts/X87/y8X9HnLL">x87</a> architecture has instructions able to load and store 64-bit (and 32-bit) floating-point values in memory, the internal floating-point data and register format is 80 bits wide, while the general-purpose registers are 32 bits wide. In contrast, the 64-bit <a href="/facts/DEC_Alpha/4eN7LuXG">Alpha</a> family uses a 64-bit floating-point data and register format, and 64-bit integer registers.

<h2 id="history">History</h2>
Many computer <a href="/facts/Instruction_set/8p8vwUeE">instruction sets</a> are designed so that a single integer register can store the <a href="/facts/Memory_address/7EsUmbea">memory address</a> to any location in the computer's physical or <a href="/facts/Virtual_memory/Lw2GemF5">virtual memory</a>. Therefore, the total number of addresses to memory is often determined by the width of these registers. The <a href="/facts/IBM/QszA7nwd">IBM</a> <a href="/facts/System%2f360/7znvpy4K">System/360</a> of the 1960s was an early 32-bit computer; it had 32-bit integer registers, although it only used the low order 24 bits of a word for addresses, resulting in a 16 <a href="/facts/Mebibyte/BNHUp9Qq">MiB</a> (16 × 10242 bytes) address space. 32-bit <a href="/facts/Superminicomputer/MkAxa8fs">superminicomputers</a>, such as the <a href="/facts/Digital_Equipment_Corporation/ztxs6keA">DEC</a> <a href="/facts/VAX/N3r13IHH">VAX</a>, became common in the 1970s, and 32-bit microprocessors, such as the <a href="/facts/Motorola_68000_family/jxd7VPlW">Motorola 68000 family</a> and the <a href="/facts/IA-32/7yTv1aHH">32-bit members of the x86 family</a> starting with the <a href="/facts/Intel_80386/ag5eSgWv">Intel 80386</a>, appeared in the mid-1980s, making 32 bits something of a de facto consensus as a convenient register size.
A 32-bit <a href="/facts/Address_register/32RvbUdz">address register</a> meant that 232 addresses, or 4 <a href="/facts/Gigabyte/s2hb2SEg">GB</a> of <a href="/facts/Random-access_memory/DuD4bxh6">random-access memory</a> (RAM), could be referenced. When these architectures were devised, 4 GB of memory was so far beyond the typical amounts (4 MiB) in installations, that this was considered to be enough headroom for addressing. 4.29 billion addresses were considered an appropriate size to work with for another important reason: 4.29 billion integers are enough to assign unique references to most entities in applications like <a href="/facts/Database/VYcpkevb">databases</a>.
Some <a href="/facts/Supercomputer/HT9NwGAN">supercomputer</a> architectures of the 1970s and 1980s, such as the <a href="/facts/Cray-1/4afuzp0D">Cray-1</a>,<a class="footnote-ref" id="fnref:3" href="#fn:3">3</a> used registers up to 64 bits wide, and supported 64-bit integer arithmetic, although they did not support 64-bit addressing. In the mid-1980s, <a href="/facts/Intel_i860/e2wRyFV1">Intel i860</a><a class="footnote-ref" id="fnref:4" href="#fn:4">4</a> development began culminating in a 1989 release; the i860 had 32-bit integer registers and 32-bit addressing, so it was not a fully 64-bit processor, although its graphics unit supported 64-bit integer arithmetic.<a class="footnote-ref" id="fnref:5" href="#fn:5">5</a> However, 32 bits remained the norm until the early 1990s, when the continual reductions in the cost of memory led to installations with amounts of RAM approaching 4 GB, and the use of virtual memory spaces exceeding the 4 GB ceiling became desirable for handling certain types of problems. In response, MIPS and DEC developed 64-bit microprocessor architectures, initially for high-end <a href="/facts/Workstation/h5tK4hTt">workstation</a> and <a href="/facts/Server_(computing)/dEaYFD7r">server</a> machines. By the mid-1990s, <a href="/facts/HAL_Computer_Systems/6oIrDeN1">HAL Computer Systems</a>, <a href="/facts/Sun_Microsystems/VJ9EzEFd">Sun Microsystems</a>, <a href="/facts/IBM/QszA7nwd">IBM</a>, <a href="/facts/Silicon_Graphics/DKvkrfLX">Silicon Graphics</a>, and <a href="/facts/Hewlett-Packard/abuNSYNu">Hewlett-Packard</a> had developed 64-bit architectures for their workstation and server systems. A notable exception to this trend were <a href="/facts/Mainframe_computer/nrBR6rWa">mainframes</a> from IBM, which then used 32-bit data and 31-bit address sizes; the IBM mainframes did not include 64-bit processors until 2000. During the 1990s, several low-cost 64-bit microprocessors were used in consumer electronics and embedded applications. Notably, the <a href="/facts/Nintendo_64/p1rI4VQ2">Nintendo 64</a><a class="footnote-ref" id="fnref:6" href="#fn:6">6</a> and the <a href="/facts/PlayStation_2/gbFBT7AX">PlayStation 2</a> had 64-bit microprocessors before their introduction in personal computers. High-end printers, network equipment, and industrial computers also used 64-bit microprocessors, such as the <a href="/facts/Quantum_Effect_Devices/PFsUwo9Y">Quantum Effect Devices</a> <a href="/facts/R5000/oWIUcwX1">R5000</a>.<a class="footnote-ref" id="fnref:7" href="#fn:7">7</a> 64-bit computing started to trickle down to the personal computer desktop from 2003 onward, when some models in <a href="/facts/Apple_Inc./oTJYta3k">Apple</a>'s Macintosh lines switched to <a href="/facts/PowerPC_970/nRyX1JxX">PowerPC 970</a> processors (termed G5 by Apple), and <a href="/facts/Advanced_Micro_Devices/CB1G7QTb">Advanced Micro Devices</a> (AMD) released its first 64-bit <a href="/facts/X86-64/cyWvUFlP">x86-64</a> processor. Physical memory eventually caught up with 32-bit limits. In 2023, laptop computers were commonly equipped with 16GB and servers starting from 64 GB of memory,<a class="footnote-ref" id="fnref:8" href="#fn:8">8</a> greatly exceeding the 4 GB address capacity of 32 bits.

<h3>64-bit data timeline</h3>
1961
IBM delivers the <a href="/facts/IBM_7030_Stretch/V8SdUp00">IBM 7030 Stretch</a> <a href="/facts/Supercomputer/HT9NwGAN">supercomputer</a>, which uses 64-bit data words and 32- or 64-bit instruction words.
1974
<a href="/facts/Control_Data_Corporation/ChfGgfPM">Control Data Corporation</a> launches the <a href="/facts/CDC_Star-100/tH5kopJY">CDC Star-100</a> vector supercomputer, which uses a 64-bit word architecture (prior CDC systems were based on a 60-bit architecture).
<a href="/facts/International_Computers_Limited/2ztan410">International Computers Limited</a> launches the <a href="/facts/ICL_2900_Series/ka6K2NFC">ICL 2900 Series</a> with 32-bit, 64-bit, and 128-bit <a href="/facts/Two%2527s_complement/xhjYpnsc">two's complement</a> integers; 64-bit and 128-bit floating point; 32-bit, 64-bit, and 128-bit packed decimal and a 128-bit accumulator register. The architecture has survived through a succession of ICL and Fujitsu machines. The latest is the Fujitsu Supernova, which emulates the original environment on 64-bit Intel processors.
1976
<a href="/facts/Cray_Research/coAlupuy">Cray Research</a> delivers the first <a href="/facts/Cray-1/4afuzp0D">Cray-1</a> supercomputer, which is based on a 64-bit word architecture and will form the basis for later Cray vector supercomputers.
1983
<a href="/facts/Elxsi/z47oq0sP">Elxsi</a> launches the Elxsi 6400 parallel <a href="/facts/Minisupercomputer/NC8uxwE1">minisupercomputer</a>. The Elxsi architecture has 64-bit data registers but a 32-bit address space.
1989
<a href="/facts/Intel/SMF0gJJX">Intel</a> introduces the <a href="/facts/Intel_i860/e2wRyFV1">Intel i860</a> <a href="/facts/Reduced_instruction_set_computer/aQbGM62p">reduced instruction set computer</a> (RISC) processor. Marketed as a "64-Bit Microprocessor", it had essentially a 32-bit architecture, enhanced with a 3D graphics unit capable of 64-bit integer operations.<a class="footnote-ref" id="fnref:9" href="#fn:9">9</a>
1993
<a href="/facts/Atari/XK95bfqH">Atari</a> introduces the <a href="/facts/Atari_Jaguar/DCTUzXMu">Atari Jaguar</a> <a href="/facts/Video_game_console/K72D1NSS">video game console</a>, which includes some 64-bit wide data paths in its architecture.<a class="footnote-ref" id="fnref:10" href="#fn:10">10</a>
<h3>64-bit address timeline</h3>
1991
<a href="/facts/MIPS_Computer_Systems/eI0XPIYW">MIPS Computer Systems</a> produces the first 64-bit microprocessor, the <a href="/facts/R4000/1XxfW4gC">R4000</a>, which implements the <a href="/facts/MIPS_architecture/efV4KgK4">MIPS III</a> architecture, the third revision of its <a href="/facts/MIPS_architecture/efV4KgK4">MIPS architecture</a>.<a class="footnote-ref" id="fnref:11" href="#fn:11">11</a> The CPU is used in <a href="/facts/Silicon_Graphics/DKvkrfLX">SGI</a> graphics workstations starting with the <a href="/facts/SGI_Crimson/8YSuqAc9">IRIS Crimson</a>. <a href="/facts/Kendall_Square_Research/MfpMa6ld">Kendall Square Research</a> deliver their first KSR1 supercomputer, based on a proprietary 64-bit RISC processor architecture running <a href="/facts/Tru64_UNIX/J4tMy7uA">OSF/1</a>.
1992
<a href="/facts/Digital_Equipment_Corporation/ztxs6keA">Digital Equipment Corporation</a> (DEC) introduces the pure 64-bit <a href="/facts/DEC_Alpha/4eN7LuXG">Alpha</a> architecture which was born from the <a href="/facts/DEC_PRISM/qsRxJ49P">PRISM</a> project.<a class="footnote-ref" id="fnref:12" href="#fn:12">12</a>
1994
<a href="/facts/Intel/SMF0gJJX">Intel</a> announces plans for the 64-bit <a href="/facts/IA-64/m6egpGno">IA-64</a> architecture (jointly developed with <a href="/facts/Hewlett-Packard/abuNSYNu">Hewlett-Packard</a>) as a successor to its 32-bit <a href="/facts/IA-32/7yTv1aHH">IA-32</a> processors. A 1998 to 1999 launch date was targeted.
1995
<a href="/facts/Sun_Microsystems/VJ9EzEFd">Sun</a> launches a 64-bit <a href="/facts/SPARC/m7KhEtET">SPARC</a> processor, the <a href="/facts/UltraSPARC/FyAdUYjn">UltraSPARC</a>.<a class="footnote-ref" id="fnref:13" href="#fn:13">13</a> <a href="/facts/Fujitsu/6e5gvNSa">Fujitsu</a>-owned <a href="/facts/HAL_Computer_Systems/6oIrDeN1">HAL Computer Systems</a> launches workstations based on a 64-bit CPU, HAL's independently designed first-generation <a href="/facts/HAL_SPARC64/37De8GL5">SPARC64</a>. IBM releases the A10 and A30 microprocessors, the first 64-bit PowerPC AS processors.<a class="footnote-ref" id="fnref:14" href="#fn:14">14</a> IBM also releases a 64-bit AS/400 system upgrade, which can convert the operating system, database and applications.
1996
<a href="/facts/Nintendo/dMrLpaHu">Nintendo</a> introduces the <a href="/facts/Nintendo_64/p1rI4VQ2">Nintendo 64</a> video game console, built around a low-cost variant of the MIPS R4000. HP releases the first implementation of its 64-bit <a href="/facts/PA-RISC/gjDs1HEh">PA-RISC 2.0</a> architecture, the <a href="/facts/PA-8000/f5sE1Izr">PA-8000</a>.<a class="footnote-ref" id="fnref:15" href="#fn:15">15</a>
1998
IBM releases the <a href="/facts/POWER3/gDfx0LVX">POWER3</a> line of full-64-bit PowerPC/<a href="/facts/IBM_POWER_architecture/AptQ0xLu">POWER</a> processors.<a class="footnote-ref" id="fnref:16" href="#fn:16">16</a>
1999
Intel releases the <a href="/facts/Instruction_set/8p8vwUeE">instruction set</a> for the <a href="/facts/IA-64/m6egpGno">IA-64</a> architecture. <a href="/facts/AMD/CB1G7QTb">AMD</a> publicly discloses its set of 64-bit extensions to IA-32, called <a href="/facts/X86-64/cyWvUFlP">x86-64</a> (later branded AMD64).
2000
IBM ships its first 64-bit <a href="/facts/Z%2fArchitecture/FcKYkGn9">z/Architecture</a> <a href="/facts/Mainframe_computer/nrBR6rWa">mainframe</a>, the <a href="/facts/ZSeries/JJX9eAsD">zSeries</a> z900. z/Architecture is a 64-bit version of the 32-bit <a href="/facts/ESA%2f390/lzkp2UE5">ESA/390</a> architecture, a descendant of the 32-bit <a href="/facts/System%2f360/7znvpy4K">System/360</a> architecture.
2001
Intel ships its IA-64 processor line, after repeated delays in getting to market. Now branded <a href="/facts/Itanium/0wkjSDpe">Itanium</a> and targeting high-end servers, sales fail to meet expectations.
2003
AMD introduces its <a href="/facts/Opteron/IF1ueyIJ">Opteron</a> and <a href="/facts/Athlon_64/3JLpVnQd">Athlon 64</a> processor lines, based on its <a href="/facts/X86-64/cyWvUFlP">AMD64</a> architecture which is the first x86-based 64-bit processor architecture. <a href="/facts/Apple_Inc./oTJYta3k">Apple</a> also ships the 64-bit "G5" <a href="/facts/PowerPC_970/nRyX1JxX">PowerPC 970</a> CPU produced by IBM. Intel maintains that its Itanium chips would remain its only 64-bit processors.
2004
Intel, reacting to the market success of AMD, admits it has been developing a clone of the AMD64 extensions named IA-32e (later renamed EM64T, then yet again renamed to Intel 64). Intel ships updated versions of its <a href="/facts/Xeon/j1M8Hp6D">Xeon</a> and <a href="/facts/Pentium_4/6tIFuHIF">Pentium 4</a> processor families supporting the new 64-bit instruction set.
<a href="/facts/VIA_Technologies/g6REHNFE">VIA Technologies</a> announces the <a href="/facts/VIA_Isaiah/82nYJeBy">Isaiah</a> 64-bit processor.<a class="footnote-ref" id="fnref:17" href="#fn:17">17</a>
2006
Sony, IBM, and Toshiba begin manufacturing the 64-bit <a href="/facts/Cell_(processor)/p2MIQjMc">Cell processor</a> for use in the <a href="/facts/PlayStation_3/obhuo97V">PlayStation 3</a>, servers, workstations, and other appliances. Intel released <a href="/facts/Intel_Core_(microarchitecture)/fuKkuVsP">Core 2 Duo</a> as the first mainstream x86-64 processor for its mobile, desktop, and workstation line. Prior 64-bit extension processor lines were not widely available in the consumer retail market (most of 64-bit Pentium 4/D were OEM), 64-bit Pentium 4, Pentium D, and Celeron were not into mass production until late 2006 due to poor yield issue (most of good yield wafers were targeted at server and mainframe while mainstream still remain 130 nm 32-bit processor line until 2006) and soon became low end after Core 2 debuted. AMD released their first 64-bit mobile processor and manufactured in 90 nm.
2011
<a href="/facts/ARM_Holdings/jqqppj7b">ARM Holdings</a> announces ARMv8-A, the first 64-bit version of the <a href="/facts/ARM_architecture_family/SALsYA79">ARM architecture family</a>.<a class="footnote-ref" id="fnref:18" href="#fn:18">18</a>
2012
ARM Holdings announced their Cortex-A53 and Cortex-A57 cores, their first cores based on their 64-bit architecture, on 30 October 2012.<a class="footnote-ref" id="fnref:19" href="#fn:19">19</a><a class="footnote-ref" id="fnref:20" href="#fn:20">20</a>
2013
Apple announces the <a href="/facts/IPhone_5S/5adgnjro">iPhone 5S</a>, with the world's first 64-bit processor in a smartphone, which uses their <a href="/facts/Apple_A7/WIaQPsQe">A7</a> ARMv8-A-based system-on-a-chip alongside the <a href="/facts/IPad_Air/FzUDtnv8">iPad Air</a> and <a href="/facts/IPad_Mini_2/1jDWPe6Q">iPad Mini 2</a> which are the world's first 64-bit processor in a tablet.
2014
<a href="/facts/RISC-V/pUSKDat1">RISC-V</a>, with both 32-bit and 64-bit support, was published.<a class="footnote-ref" id="fnref:21" href="#fn:21">21</a> Google announces the <a href="/facts/Nexus_9/ss3hWJsz">Nexus 9</a> tablet, the first Android device to run on the 64-bit Tegra K1 chip.
2015
Apple announces the <a href="/facts/IPod_Touch_(6th_generation)/m6pHTy37">iPod Touch (6th generation)</a>, the first iPod Touch to use the 64-bit processor <a href="/facts/Apple_A8/8hdFEwue">A8</a> ARMv8-A-based system-on-a-chip alongside the <a href="/facts/Apple_TV/FHVJqBCw">Apple TV (4th generation)</a> which is the world's first 64-bit processor in an Apple TV.
2018
Apple announces the <a href="/facts/Apple_Watch/tJjbXQEa">Apple Watch Series 4</a>, the first Apple Watch to use the 64-bit processor <a href="/facts/Apple_S4/CLj1YWHe">S4</a> ARMv8-A-based system-on-a-chip.
2020
Synopsis announce the ARCv3 ISA, the first 64-bit version of the <a href="/facts/ARC_(processor)/oFXJYBNR">ARC ISA</a>.<a class="footnote-ref" id="fnref:22" href="#fn:22">22</a> Apple releases <a href="/facts/Apple_M1/vaTA4u2J">Apple M1</a>, which lack support for 32-bit applications.
2023
Qualcomm releases Snapdragon 8 Gen 3 and <a href="/facts/Snapdragon_X_Elite/YIpmqPP9">Snapdragon X Elite</a>, which lack support for 32-bit ARM applications.
<h3>64-bit operating system timeline</h3>
1985
<a href="/facts/Cray/coAlupuy">Cray</a> releases <a href="/facts/UNICOS/mwPQANKw">UNICOS</a>, the first 64-bit implementation of the <a href="/facts/Unix/0pNL2seI">Unix</a> operating system.<a class="footnote-ref" id="fnref:23" href="#fn:23">23</a>
1993
DEC releases the 64-bit <a href="/facts/Tru64_UNIX/J4tMy7uA">DEC OSF/1 AXP</a> <a href="/facts/Unix-like/YAKrAxzd">Unix-like</a> operating system (later renamed Tru64 UNIX) for its systems based on the <a href="/facts/DEC_Alpha/4eN7LuXG">Alpha</a> architecture.
1994
Support for the <a href="/facts/R8000/unon78tr">R8000</a> processor is added by <a href="/facts/Silicon_Graphics/DKvkrfLX">Silicon Graphics</a> to the <a href="/facts/IRIX/vK9rSatM">IRIX</a> <a href="/facts/Operating_system/8XTuvMh2">operating system</a> in release 6.0.
1995
DEC releases <a href="/facts/OpenVMS/rAnHAgpD">OpenVMS</a> 7.0, the first full 64-bit version of OpenVMS for Alpha. First 64-bit <a href="/facts/Linux_distribution/0vVl4N4f">Linux distribution</a> for the Alpha architecture is released.<a class="footnote-ref" id="fnref:24" href="#fn:24">24</a>
1996
Support for the R4x00 processors in 64-bit mode is added by <a href="/facts/Silicon_Graphics/DKvkrfLX">Silicon Graphics</a> to the <a href="/facts/IRIX/vK9rSatM">IRIX</a> <a href="/facts/Operating_system/8XTuvMh2">operating system</a> in release 6.2.
1998
Sun releases <a href="/facts/Solaris_(operating_system)/KPfT98EJ">Solaris</a> 7, with full 64-bit <a href="/facts/UltraSPARC/FyAdUYjn">UltraSPARC</a> support.
2000
IBM releases <a href="/facts/Z%2fOS/amLCAlgV">z/OS</a>, a 64-bit operating system descended from <a href="/facts/MVS/VPSmB9ML">MVS</a>, for the new <a href="/facts/ZSeries/JJX9eAsD">zSeries</a> 64-bit mainframes; 64-bit <a href="/facts/Linux_on_z_Systems/bgLdzJQf">Linux on z Systems</a> follows the CPU release almost immediately.
2001
Linux becomes the first OS kernel to fully support <a href="/facts/X86-64/cyWvUFlP">x86-64</a> (on a simulator, as no x86-64 processors had been released yet).<a class="footnote-ref" id="fnref:25" href="#fn:25">25</a>
2001
Microsoft releases <a href="/facts/Windows_XP_64-Bit_Edition/ryUtCmRe">Windows XP 64-Bit Edition</a> for the <a href="/facts/Itanium/0wkjSDpe">Itanium</a>'s IA-64 architecture; it could run <a href="/facts/32-bit_application/TDMVce8s">32-bit applications</a> through an execution layer.
2003
Apple releases its <a href="/facts/Mac_OS_X_Panther/lDrnzKAe">Mac OS X 10.3</a> "Panther" operating system which adds support for native 64-bit integer arithmetic on <a href="/facts/PowerPC_970/nRyX1JxX">PowerPC 970</a> processors.<a class="footnote-ref" id="fnref:26" href="#fn:26">26</a> Several <a href="/facts/Linux/9FvCKSTq">Linux</a> <a href="/facts/Linux_distribution/0vVl4N4f">distributions</a> release with support for <a href="/facts/AMD64/cyWvUFlP">AMD64</a>. <a href="/facts/FreeBSD/RKsFTm7F">FreeBSD</a> releases with support for AMD64.
2005
On January 4, Microsoft discontinues Windows XP 64-Bit Edition, as no PCs with IA-64 processors had been available since the previous September, and announces that it is developing x86-64 versions of Windows to replace it.<a class="footnote-ref" id="fnref:27" href="#fn:27">27</a> On January 31, Sun releases <a href="/facts/Solaris_(operating_system)/KPfT98EJ">Solaris 10</a> with support for AMD64 and EM64T processors. On April 29, Apple releases <a href="/facts/Mac_OS_X_Tiger/q6vKCpvq">Mac OS X 10.4</a> "Tiger" which provides limited support for 64-bit command-line applications on machines with PowerPC 970 processors; later versions for Intel-based Macs supported 64-bit command-line applications on Macs with EM64T processors. On April 30, Microsoft releases <a href="/facts/Windows_XP_Professional_x64_Edition/Xsx8RocW">Windows XP Professional x64 Edition</a> and <a href="/facts/Windows_Server_2003/3vIJam5L">Windows Server 2003</a> x64 Edition for AMD64 and EM64T processors.<a class="footnote-ref" id="fnref:28" href="#fn:28">28</a>
2006
Microsoft releases <a href="/facts/Windows_Vista/IASEUCTB">Windows Vista</a>, including a 64-bit version for AMD64/EM64T processors that retains 32-bit compatibility. In the 64-bit version, all Windows applications and components are 64-bit, although many also have their 32-bit versions included for compatibility with <a href="/facts/Plug-in_(computing)/351Du3Wu">plug-ins</a>.
2007
Apple releases <a href="/facts/Mac_OS_X_Leopard/UmXw4H5x">Mac OS X 10.5</a> "Leopard", which fully supports 64-bit applications on machines with PowerPC 970 or EM64T processors.
2009
Microsoft releases <a href="/facts/Windows_7/tldLdbnX">Windows 7</a>, which, like Windows Vista, includes a full 64-bit version for AMD64/Intel 64 processors; most new computers are loaded by default with a 64-bit version. Microsoft also releases <a href="/facts/Windows_Server_2008_R2/fphr15Tu">Windows Server 2008 R2</a>, which is the first 64-bit only server operating system. Apple releases <a href="/facts/Mac_OS_X_Snow_Leopard/GGNogRTe">Mac OS X 10.6</a>, "Snow Leopard", which ships with a 64-bit kernel for AMD64/Intel64 processors, although only certain recent models of Apple computers will run the 64-bit kernel by default. Most applications bundled with Mac OS X 10.6 are now also 64-bit.<a class="footnote-ref" id="fnref:29" href="#fn:29">29</a>
2011
Apple releases <a href="/facts/Mac_OS_X_Lion/CHyxXg8X">Mac OS X 10.7</a>, "Lion", which runs the 64-bit kernel by default on supported machines. Older machines that are unable to run the 64-bit kernel run the 32-bit kernel, but, as with earlier releases, can still run 64-bit applications; Lion does not support machines with 32-bit processors. Nearly all applications bundled with Mac OS X 10.7 are now also 64-bit, including iTunes.
2012
Microsoft releases <a href="/facts/Windows_8/eRtw96T3">Windows 8</a> which supports UEFI Class 3 (<a href="/facts/UEFI/w86VGmy2">UEFI</a> without CSM) and <a href="/facts/Secure_Boot/w86VGmy2">Secure Boot</a>.<a class="footnote-ref" id="fnref:30" href="#fn:30">30</a> Apple releases <a href="/facts/OS_X_Mountain_Lion/GIu66667">OS X Mountain Lion</a>, which makes the 64-bit kernel the default on some older previously unsupported machines and removes the 32-bit kernel.
2013
Apple releases <a href="/facts/IOS_7/LP8uLlwP">iOS 7</a>, which, on machines with AArch64 processors, has a 64-bit kernel that supports 64-bit applications.
2014
Google releases <a href="/facts/Android_Lollipop/kAem58xg">Android Lollipop</a>, the first version of the <a href="/facts/Android_(operating_system)/nNyHb0xz">Android</a> operating system with support for 64-bit processors.
2017
Apple releases <a href="/facts/IOS_11/jjEcdM3E">iOS 11</a>, supporting only machines with AArch64 processors. It has a 64-bit kernel that only supports 64-bit applications. 32-bit applications are no longer compatible.
2018
Apple releases <a href="/facts/WatchOS_5/zH1fkn2R">watchOS 5</a>, the first watchOS version to bring the 64-bit support.
2019
Apple releases <a href="/facts/MacOS_Catalina/B2RE5fGd">macOS 10.15</a> "Catalina", dropping support for 32-bit Intel applications.
2021
Microsoft releases <a href="/facts/Windows_11/J2ywV8r4">Windows 11</a> on October 5, which only supports 64-bit systems, dropping support for IA-32 and AArch32 systems.
2022
Google releases the <a href="/facts/Pixel_7/fM0W2mkV">Pixel 7</a>, which drops support for 32-bit applications. Apple releases <a href="/facts/WatchOS_9/zH1fkn2R">watchOS 9</a>, the first watchOS version to run exclusively on the Apple Watch models with 64-bit processors (including Apple Watch Series 4 or newer, <a href="/facts/Apple_Watch/tJjbXQEa">Apple Watch SE (1st generation)</a> or newer and the newly introduced <a href="/facts/Apple_Watch/tJjbXQEa">Apple Watch Ultra</a>), dropping support for <a href="/facts/Apple_Watch/tJjbXQEa">Apple Watch Series 3</a> as the final Apple Watch model with 32-bit processor.
2023
Google releases <a href="/facts/Android_14/bEoMeoDy">Android 14</a>, which drops support for 32-bit applications.
2024
Microsoft releases <a href="/facts/Windows_11%2c_version_24H2/hJeC6AcL">Windows 11 2024 Update</a>, ARM versions of which drop support for 32-bit ARM applications.
<h2 id="limits-of-processors">Limits of processors</h2>
In principle, a 64-bit microprocessor can address 16 EB (16 × 10246 = 264 = 18,446,744,073,709,551,616 bytes) of memory. However, not all instruction sets, and not all processors implementing those instruction sets, support a full 64-bit virtual or physical address space.
The <a href="/facts/X86-64/cyWvUFlP">x86-64 architecture</a> (as of March 2024) allows 48 bits for virtual memory and, for any given processor, up to 52 bits for physical memory.<a class="footnote-ref" id="fnref:31" href="#fn:31">31</a><a class="footnote-ref" id="fnref:32" href="#fn:32">32</a> These limits allow memory sizes of 256 <a href="/facts/Terabyte/BNHUp9Qq">TB</a> (256 × 10244 bytes) and 4 <a href="/facts/Petabyte/BNHUp9Qq">PB</a> (4 × 10245 bytes), respectively. A PC cannot currently contain 4 <a href="/facts/Petabyte/BNHUp9Qq">petabytes</a> of memory (due to the physical size of the memory chips), but AMD envisioned large servers, shared memory clusters, and other uses of physical address space that might approach this in the foreseeable future. Thus the 52-bit physical address provides ample room for expansion while not incurring the cost of implementing full 64-bit physical addresses. Similarly, the 48-bit virtual address space was designed to provide 65,536 (216) times the 32-bit limit of 4 GB (4 × 10243 bytes), allowing room for later expansion and incurring no overhead of translating full 64-bit addresses.
The <a href="/facts/Power_ISA/GLy1WS0m">Power ISA v3.0</a> allows 64 bits for an effective address, mapped to a segmented address with between 65 and 78 bits allowed, for virtual memory, and, for any given processor, up to 60 bits for physical memory.<a class="footnote-ref" id="fnref:33" href="#fn:33">33</a>
The Oracle <a href="/facts/SPARC/m7KhEtET">SPARC</a> Architecture 2015 allows 64 bits for virtual memory and, for any given processor, between 40 and 56 bits for physical memory.<a class="footnote-ref" id="fnref:34" href="#fn:34">34</a>
The ARM <a href="/facts/AArch64/bauXRos7">AArch64</a> Virtual Memory System Architecture allows from 48 to 56 bits for virtual memory and, for any given processor, from 32 to 56 bits for physical memory.<a class="footnote-ref" id="fnref:35" href="#fn:35">35</a>
The <a href="/facts/DEC_Alpha/4eN7LuXG">DEC Alpha</a> specification requires minimum of 43 bits of virtual memory address space (8 TB) to be supported, and hardware need to check and trap if the remaining unsupported bits are zero (to support compatibility on future processors). <a href="/facts/Alpha_21064/BlTYh5ad">Alpha 21064</a> supported 43 bits of virtual memory address space (8 TB) and 34 bits of physical memory address space (16 GB). <a href="/facts/Alpha_21164/2EE1krYp">Alpha 21164</a> supported 43 bits of virtual memory address space (8 TB) and 40 bits of physical memory address space (1 TB). <a href="/facts/Alpha_21264/lVKS3c4I">Alpha 21264</a> supported user-configurable 43 or 48 bits of virtual memory address space (8 TB or 256 TB) and 44 bits of physical memory address space (16 TB).

<h2 id="64-bit-applications">64-bit applications</h2>
<h3>32-bit vs 64-bit</h3>
A change from a <a href="/facts/32-bit_computing/TDMVce8s">32-bit</a> to a 64-bit architecture is a fundamental alteration, as most <a href="/facts/Operating_system/8XTuvMh2">operating systems</a> must be extensively modified to take advantage of the new architecture, because that software has to manage the actual memory addressing hardware.<a class="footnote-ref" id="fnref:36" href="#fn:36">36</a> Other software must also be <a href="/facts/Porting/7s6tFs8B">ported</a> to use the new abilities; older 32-bit software may be supported either by virtue of the 64-bit instruction set being a superset of the 32-bit instruction set, so that processors that support the 64-bit instruction set can also run code for the 32-bit instruction set, or through software <a href="/facts/Emulator/FMHE8qDj">emulation</a>, or by the actual implementation of a 32-bit processor core within the 64-bit processor, as with some <a href="/facts/Itanium/0wkjSDpe">Itanium</a> processors from Intel, which included an <a href="/facts/IA-32/7yTv1aHH">IA-32</a> processor core to run 32-bit <a href="/facts/X86/Kypq5fgu">x86</a> applications. The operating systems for those 64-bit architectures generally support both 32-bit and 64-bit applications.<a class="footnote-ref" id="fnref:37" href="#fn:37">37</a>
One significant exception to this is the <a href="/facts/IBM_AS%2f400/BWYaNnqe">IBM AS/400</a>, software for which is compiled into a virtual <a href="/facts/Instruction_set_architecture/8p8vwUeE">instruction set architecture</a> (ISA) called Technology Independent Machine Interface (TIMI); TIMI code is then translated to native machine code by low-level software before being executed. The translation software is all that must be rewritten to move the full OS and all software to a new platform, as when IBM transitioned the native instruction set for AS/400 from the older 32/48-bit IMPI to the newer 64-bit PowerPC-AS, codenamed Amazon. The IMPI instruction set was quite different from even 32-bit PowerPC, so this transition was even bigger than moving a given instruction set from 32 to 64 bits.
On 64-bit hardware with <a href="/facts/X86-64/cyWvUFlP">x86-64</a> architecture (AMD64), most 32-bit operating systems and applications can run with no compatibility issues. While the larger address space of 64-bit architectures makes working with large data sets in applications such as <a href="/facts/Digital_video/xsn9omqG">digital video</a>, scientific computing, and large <a href="/facts/Database/VYcpkevb">databases</a> easier, there has been considerable debate on whether they or their 32-bit <a href="/facts/Compatibility_mode/lsVy9cKG">compatibility modes</a> will be faster than comparably priced 32-bit systems for other tasks.
A compiled Java program can run on a 32- or 64-bit Java virtual machine with no modification. The lengths and precision of all the built-in types, such as char, short, int, long, float, and double, and the types that can be used as array indices, are specified by the standard and are not dependent on the underlying architecture. Java programs that run on a 64-bit Java virtual machine have access to a larger address space.<a class="footnote-ref" id="fnref:38" href="#fn:38">38</a>
Speed is not the only factor to consider in comparing 32-bit and 64-bit processors. Applications such as multi-tasking, stress testing, and clustering – for <a href="/facts/High-performance_computing/HT9NwGAN">high-performance computing</a> (HPC) – may be more suited to a 64-bit architecture when deployed appropriately. For this reason, 64-bit clusters have been widely deployed in large organizations, such as IBM, HP, and Microsoft.
Summary:

<ul><li>A 64-bit processor performs best with 64-bit software.</li>
<li>A 64-bit processor may have <a href="/facts/Backward_compatibility/FbHFBu5y">backward compatibility</a>, allowing it to run 32-bit application software for the 32-bit version of its instruction set, and may also support running 32-bit operating systems for the 32-bit version of its instruction set.</li>
<li>A 32-bit processor is incompatible with 64-bit software.</li></ul>
<h3>Pros and cons</h3>
A common misconception is that 64-bit architectures are no better than 32-bit architectures unless the computer has more than 4 GB of <a href="/facts/Random-access_memory/DuD4bxh6">random-access memory</a>.<a class="footnote-ref" id="fnref:39" href="#fn:39">39</a> This is not entirely true:

<ul><li>Some operating systems and certain hardware configurations limit the physical memory space to 3 GB on <a href="/facts/IA-32/7yTv1aHH">IA-32</a> systems, due to much of the 3–4 GB region being reserved for hardware addressing; see <a href="/facts/3_GB_barrier/fRQwMtFP">3 GB barrier</a>; 64-bit architectures can address far more than 4 GB. However, IA-32 processors from the <a href="/facts/Pentium_Pro/mTAN64fo">Pentium Pro</a> onward allow a 36-bit physical memory address space, using <a href="/facts/Physical_Address_Extension/aEr4tj4x">Physical Address Extension</a> (PAE), which gives a 64 GB physical address range, of which up to 62 GB may be used by main memory; operating systems that support PAE may not be limited to 4 GB of physical memory, even on IA-32 processors. However, drivers and other kernel mode software, more so older versions, may be incompatible with PAE; this has been cited as the reason for 32-bit versions of <a href="/facts/Microsoft_Windows/bwhAhuSL">Microsoft Windows</a> being limited to 4 GB of physical RAM<a class="footnote-ref" id="fnref:40" href="#fn:40">40</a> (although the validity of this explanation has been disputed<a class="footnote-ref" id="fnref:41" href="#fn:41">41</a>).</li>
<li>Some operating systems reserve portions of <a href="/facts/Process_(computing)/Vcq7EnUV">process</a> <a href="/facts/Address_space/EscyYKkP">address space</a> for OS use, effectively reducing the total address space available for mapping memory for user programs. For instance, 32-bit Windows reserves 1 or 2 GB (depending on the settings) of the total address space for the kernel, which leaves only 3 or 2 GB (respectively) of the address space available for user mode. This limit is much higher on 64-bit operating systems.</li>
<li><a href="/facts/Memory-mapped_file/veYrNQnl">Memory-mapped files</a> are becoming more difficult to implement in 32-bit architectures as files of over 4 GB become more common; such large files cannot be memory-mapped easily to 32-bit architectures, as only part of the file can be mapped into the address space at a time, and to access such a file by memory mapping, the parts mapped must be swapped into and out of the address space as needed. This is a problem, as memory mapping, if properly implemented by the OS, is one of the most efficient disk-to-memory methods.</li>
<li>Some 64-bit programs, such as encoders, decoders and encryption software, can benefit greatly from 64-bit registers, while the performance of other programs, such as 3D graphics-oriented ones, remains unaffected when switching from a 32-bit to a 64-bit environment.</li>
<li>Some 64-bit architectures, such as <a href="/facts/X86-64/cyWvUFlP">x86-64</a> and <a href="/facts/AArch64/bauXRos7">AArch64</a>, support more general-purpose registers than their 32-bit counterparts (although this is not due specifically to the word length). This leads to a significant speed increase for tight loops since the processor does not have to fetch data from the cache or main memory if the data can fit in the available registers.</li></ul>
Example in <a href="/facts/C_(programming_language)/Ky2No763">C</a>:
int a, b, c, d, e;
for (a = 0; a < 100; a++) {
 b = a;
 c = b;
 d = c;
 e = d;
}

This code first creates 5 values: a, b, c, d and e; and then puts them in a loop. During the loop, this code changes the value of b to the value of a, the value of c to the value of b, the value of d to the value of c and the value of e to the value of d. This has the same effect as changing all the values to a.
If a processor can keep only two or three values or variables in registers, it would need to move some values between memory and registers to be able to process variables d and e also; this is a process that takes many CPU cycles. A processor that can hold all values and variables in registers can loop through them with no need to move data between registers and memory for each iteration. This behavior can easily be compared with virtual memory, although any effects are contingent on the compiler.
The main disadvantage of 64-bit architectures is that, relative to 32-bit architectures, the same data occupies more space in memory (due to longer pointers and possibly other types, and alignment padding). This increases the memory requirements of a given process and can have implications for efficient processor cache use. Maintaining a partial 32-bit model is one way to handle this, and is in general reasonably effective. For example, the <a href="/facts/Z%2fOS/amLCAlgV">z/OS</a> operating system takes this approach, requiring program code to reside in 31-bit address spaces (the high order bit is not used in address calculation on the underlying hardware platform) while data objects can optionally reside in 64-bit regions. Not all such applications require a large address space or manipulate 64-bit data items, so these applications do not benefit from these features.

<h3>Software availability</h3>
x86-based 64-bit systems sometimes lack equivalents of <a href="/facts/Software/RP79lVSW">software</a> that is written for 32-bit architectures. The most severe problem in Microsoft Windows is incompatible <a href="/facts/Device_driver/rDYnHU1G">device drivers</a> for obsolete hardware. Most 32-bit application software can run on a 64-bit operating system in a <a href="/facts/Compatibility_mode/lsVy9cKG">compatibility mode</a>, also termed an <a href="/facts/Emulator/FMHE8qDj">emulation</a> mode, e.g., Microsoft <a href="/facts/WoW64/Tam2AYLP">WoW64</a> Technology for IA-64 and AMD64. The 64-bit Windows Native Mode<a class="footnote-ref" id="fnref:42" href="#fn:42">42</a> driver environment runs atop 64-bit NTDLL.DLL, which cannot call 32-bit Win32 subsystem code (often devices whose actual hardware function is emulated in user mode software, like Winprinters). Because 64-bit drivers for most devices were unavailable until early 2007 (Vista x64), using a 64-bit version of Windows was considered a challenge. However, the trend has since moved toward 64-bit computing, more so as memory prices dropped and the use of more than 4 GB of RAM increased. Most manufacturers started to provide both 32-bit and 64-bit drivers for new devices, so unavailability of 64-bit drivers ceased to be a problem. 64-bit drivers were not provided for many older devices, which could consequently not be used in 64-bit systems.
Driver compatibility was less of a problem with open-source drivers, as 32-bit ones could be modified for 64-bit use. Support for hardware made before early 2007, was problematic for open-source platforms, due to the relatively small number of users.
64-bit versions of Windows cannot run <a href="/facts/16-bit/bTGS44Ne">16-bit software</a>. However, most 32-bit applications will work well. 64-bit users are forced to install a <a href="/facts/Virtual_machine/BLevU3sx">virtual machine</a> of a 16- or 32-bit operating system to run 16-bit applications or use one of the alternatives for <a href="/facts/NTVDM/Wv1jNzBx">NTVDM</a>.<a class="footnote-ref" id="fnref:43" href="#fn:43">43</a>
<a href="/facts/Mac_OS_X_Tiger/q6vKCpvq">Mac OS X 10.4</a> "Tiger" and <a href="/facts/Mac_OS_X_Leopard/UmXw4H5x">Mac OS X 10.5</a> "Leopard" had only a 32-bit kernel, but they can run 64-bit user-mode code on 64-bit processors. <a href="/facts/Mac_OS_X_Snow_Leopard/GGNogRTe">Mac OS X 10.6</a> "Snow Leopard" had both 32- and 64-bit kernels, and, on most Macs, used the 32-bit kernel even on 64-bit processors. This allowed those Macs to support 64-bit processes while still supporting 32-bit device drivers; although not 64-bit drivers and performance advantages that can come with them. <a href="/facts/Mac_OS_X_Lion/CHyxXg8X">Mac OS X 10.7</a> "Lion" ran with a 64-bit kernel on more Macs, and <a href="/facts/OS_X_Mountain_Lion/GIu66667">OS X 10.8</a> "Mountain Lion" and later <a href="/facts/MacOS/Y93vVpTm">macOS</a> releases only have a 64-bit kernel. On systems with 64-bit processors, both the 32- and 64-bit macOS kernels can run 32-bit user-mode code, and all versions of macOS up to macOS Mojave (10.14) include 32-bit versions of libraries that 32-bit applications would use, so 32-bit user-mode software for macOS will run on those systems. The 32-bit versions of libraries have been removed by Apple in macOS Catalina (10.15).
<a href="/facts/Linux/9FvCKSTq">Linux</a> and most other <a href="/facts/Unix-like/YAKrAxzd">Unix-like</a> operating systems, and the <a href="/facts/C_(programming_language)/Ky2No763">C</a> and <a href="/facts/C%252B%252B/Et0F2qn9">C++</a> <a href="/facts/Toolchain/SmlWCJhY">toolchains</a> for them, have supported 64-bit processors for many years. Many applications and libraries for those platforms are <a href="/facts/Open-source_software/HzTaB8E9">open-source software</a>, written in C and C++, so that if they are 64-bit-safe, they can be compiled into 64-bit versions. This source-based distribution model, with an emphasis on frequent releases, makes availability of application software for those operating systems less of an issue.

<h2 id="64-bit-data-models">64-bit data models</h2>
In 32-bit programs, <a href="/facts/Pointer_(computer_programming)/fPoNzy9b">pointers</a> and data types such as integers generally have the same length. This is not necessarily true on 64-bit machines.<a class="footnote-ref" id="fnref:44" href="#fn:44">44</a><a class="footnote-ref" id="fnref:45" href="#fn:45">45</a><a class="footnote-ref" id="fnref:46" href="#fn:46">46</a> Mixing data types in programming languages such as <a href="/facts/C_(programming_language)/Ky2No763">C</a> and its descendants such as <a href="/facts/C%252B%252B/Et0F2qn9">C++</a> and <a href="/facts/Objective-C/5mM557BW">Objective-C</a> may thus work on 32-bit implementations but not on 64-bit implementations.
In many programming environments for C and C-derived languages on 64-bit machines, int variables are still 32 bits wide, but long integers and pointers are 64 bits wide. These are described as having an LP64 <a href="/facts/Data_model/j1YyzpJ3">data model</a>, which is an abbreviation of "Long, Pointer, 64".<a class="footnote-ref" id="fnref:47" href="#fn:47">47</a><a class="footnote-ref" id="fnref:48" href="#fn:48">48</a> Other models are the ILP64 data model in which all three data types are 64 bits wide,<a class="footnote-ref" id="fnref:49" href="#fn:49">49</a><a class="footnote-ref" id="fnref:50" href="#fn:50">50</a> and even the SILP64 model where short integers are also 64 bits wide.<a class="footnote-ref" id="fnref:51" href="#fn:51">51</a><a class="footnote-ref" id="fnref:52" href="#fn:52">52</a> However, in most cases the modifications required are relatively minor and straightforward, and many well-written programs can simply be recompiled for the new environment with no changes. Another alternative is the LLP64 model, which maintains compatibility with 32-bit code by leaving both int and long as 32-bit.<a class="footnote-ref" id="fnref:53" href="#fn:53">53</a><a class="footnote-ref" id="fnref:54" href="#fn:54">54</a> LL refers to the long long integer type, which is at least 64 bits on all platforms, including 32-bit environments.
There are also systems with 64-bit processors using an ILP32 data model, with the addition of 64-bit long long integers; this is also used on many platforms with 32-bit processors. This model reduces code size and the size of data structures containing pointers, at the cost of a much smaller address space, a good choice for some embedded systems. For instruction sets such as x86 and ARM in which the 64-bit version of the instruction set has more registers than does the 32-bit version, it provides access to the additional registers without the space penalty. It is common in 64-bit RISC machines, explored in x86 as <a href="/facts/X32_ABI/K8rgsz3p">x32 ABI</a>, and has recently been used in the <a href="/facts/Apple_Watch_Series_4/p0UIoSf9">Apple Watch Series 4</a> and 5.<a class="footnote-ref" id="fnref:55" href="#fn:55">55</a><a class="footnote-ref" id="fnref:56" href="#fn:56">56</a>

64-bit data models<table><tbody><tr><th>Datamodel</th><th>shortint</th><th>int</th><th>longint</th><th>longlong</th><th>Pointer,size_t</th><th>Sample operating systems</th></tr><tr><th>ILP32</th><td>16</td><td>32</td><td>32</td><td>64</td><td>32</td><td>x32 and arm64ilp32 ABIs on Linux systems; MIPS N32 ABI.</td></tr><tr><th>LLP64</th><td>16</td><td>32</td><td>32</td><td>64</td><td>64</td><td><a href="/facts/Microsoft_Windows/bwhAhuSL">Microsoft Windows</a> (x86-64, IA-64, and ARM64) using <a href="/facts/Visual_C%252B%252B/RM3sbYw5">Visual C++</a>; and <a href="/facts/MinGW/t0kRm9Xe">MinGW</a></td></tr><tr><th>LP64</th><td>16</td><td>32</td><td>64</td><td>64</td><td>64</td><td>Most <a href="/facts/Unix/0pNL2seI">Unix</a> and <a href="/facts/Unix-like/YAKrAxzd">Unix-like</a> systems, e.g., <a href="/facts/Solaris_(operating_system)/KPfT98EJ">Solaris</a>, <a href="/facts/Linux/9FvCKSTq">Linux</a>, <a href="/facts/BSD/XQKcURrh">BSD</a>, <a href="/facts/MacOS/Y93vVpTm">macOS</a>. <a href="/facts/Windows/bwhAhuSL">Windows</a> when using <a href="/facts/Cygwin/0ANCmAgH">Cygwin</a>; <a href="/facts/Z%2fOS/amLCAlgV">z/OS</a></td></tr><tr><th>ILP64</th><td>16</td><td>64</td><td>64</td><td>64</td><td>64</td><td><a href="/facts/HAL_Computer_Systems/6oIrDeN1">HAL Computer Systems</a> port of Solaris to the <a href="/facts/HAL_SPARC64/37De8GL5">SPARC64</a></td></tr><tr><th>SILP64</th><td>64</td><td>64</td><td>64</td><td>64</td><td>64</td><td>Classic <a href="/facts/UNICOS/mwPQANKw">UNICOS</a><a class="footnote-ref" id="fnref:57" href="#fn:57">57</a><a class="footnote-ref" id="fnref:58" href="#fn:58">58</a> (versus UNICOS/mp, etc.)</td></tr></tbody></table>
Many 64-bit platforms today use an LP64 model (including Solaris, <a href="/facts/AIX/cRWERua2">AIX</a>, <a href="/facts/HP-UX/hIvLDdJF">HP-UX</a>, Linux, macOS, BSD, and IBM z/OS). Microsoft Windows uses an LLP64 model. The disadvantage of the LP64 model is that storing a long into an int truncates. On the other hand, converting a pointer to a long will "work" in LP64. In the LLP64 model, the reverse is true. These are not problems which affect fully standard-compliant code, but code is often written with implicit assumptions about the widths of data types. C code should prefer (u)intptr_t instead of long when casting pointers into integer objects.
A programming model is a choice made to suit a given compiler, and several can coexist on the same OS. However, the programming model chosen as the primary model for the OS <a href="/facts/Application_programming_interface/GMlN4vUr">application programming interface</a> (API) typically dominates.
Another consideration is the data model used for <a href="/facts/Device_driver/rDYnHU1G">device drivers</a>. Drivers make up the majority of the operating system code in most modern operating systems (although many may not be loaded when the operating system is running). Many drivers use pointers heavily to manipulate data, and in some cases have to load pointers of a certain size into the hardware they support for <a href="/facts/Direct_memory_access/DWuVgclV">direct memory access</a> (DMA). As an example, a driver for a 32-bit PCI device asking the device to DMA data into upper areas of a 64-bit machine's memory could not satisfy requests from the operating system to load data from the device to memory above the 4 <a href="/facts/Gigabyte/s2hb2SEg">gigabyte</a> barrier, because the pointers for those addresses would not fit into the DMA registers of the device. This problem is solved by having the OS take the memory restrictions of the device into account when generating requests to drivers for DMA, or by using an <a href="/facts/Input%25E2%2580%2593output_memory_management_unit/lvVkzUyw">input–output memory management unit</a> (IOMMU).

<h2 id="current-64-bit-architectures">Current 64-bit architectures</h2>

As of August 2023, 64-bit architectures for which processors are being manufactured include:

<ul><li>The 64-bit extension created by <a href="/facts/Advanced_Micro_Devices/CB1G7QTb">Advanced Micro Devices</a> (AMD) to Intel's <a href="/facts/X86/Kypq5fgu">x86</a> architecture (later licensed by Intel); commonly termed <a href="/facts/X86-64/cyWvUFlP">x86-64</a>, AMD64, or x64:
<ul><li>AMD's <a href="/facts/AMD64/cyWvUFlP">AMD64</a> extensions (used in <a href="/facts/Athlon_64/3JLpVnQd">Athlon 64</a>, <a href="/facts/Opteron/IF1ueyIJ">Opteron</a>, <a href="/facts/Sempron/hk5blISe">Sempron</a>, <a href="/facts/Turion_64/CNf3tLud">Turion 64</a>, <a href="/facts/Phenom_(processor)/TaGxakcd">Phenom</a>, <a href="/facts/Athlon_II/5HNz5k86">Athlon II</a>, <a href="/facts/Phenom_II/6YW9Nnz9">Phenom II</a>, <a href="/facts/AMD_Accelerated_Processing_Unit/hdApEUQw">APU</a>, <a href="/facts/AMD_FX/uPMHuACf">FX</a>, <a href="/facts/Ryzen/0hKNcAra">Ryzen</a>, and <a href="/facts/Epyc/5d30N0BK">Epyc</a> processors)</li>
<li><a href="/facts/Intel/SMF0gJJX">Intel</a>'s <a href="/facts/Intel_64/cyWvUFlP">Intel 64</a> extensions, used in <a href="/facts/Intel_Core/lwa8VSdT">Intel Core</a> 2/i3/i5/i7/i9, some <a href="/facts/Intel_Atom/1rB5zJyz">Atom</a>, and newer <a href="/facts/Celeron/kX00LpnM">Celeron</a>, <a href="/facts/Pentium/czINY469">Pentium</a>, and <a href="/facts/Xeon/j1M8Hp6D">Xeon</a> processors
<ul><li><a href="/facts/Intel/SMF0gJJX">Intel</a>'s K1OM architecture, a variant of Intel 64 with no CMOV, MMX, and SSE instructions, used in first-generation <a href="/facts/Xeon_Phi/Fv5dhyKc">Xeon Phi</a> (Knights Corner) coprocessors, binary incompatible with x86-64 programs</li></ul></li>
<li><a href="/facts/VIA_Technologies/g6REHNFE">VIA Technologies</a>' 64-bit extensions, used in the <a href="/facts/VIA_Nano/82nYJeBy">VIA Nano</a> processors</li></ul></li>
<li><a href="/facts/ARM_Holdings/jqqppj7b">ARM Holdings</a>' <a href="/facts/AArch64/bauXRos7">AArch64</a> architecture</li>
<li>IBM's <a href="/facts/PowerPC/DqmM9y50">PowerPC</a>/<a href="/facts/Power_ISA/GLy1WS0m">Power ISA</a>:
<ul><li>IBM's <a href="/facts/Power10/rJcQsWeR">Power10</a> processor and predecessors, and the <a href="/facts/IBM_A2/o4VHVJE8">IBM A2</a> processors</li></ul></li>
<li>IBM's <a href="/facts/Z%2fArchitecture/FcKYkGn9">z/Architecture</a>, a 64-bit version of the <a href="/facts/ESA%2f390/lzkp2UE5">ESA/390</a> architecture, used in IBM's <a href="/facts/IBM_Z/JJX9eAsD">IBM Z</a> <a href="/facts/IBM_mainframes/0kPkgADx">mainframes</a>:
<ul><li><a href="/facts/IBM_Telum_(microprocessor)/8Bes12cz">IBM Telum</a> II processor and predecessors</li>
<li><a href="/facts/Hitachi/KeK38e82">Hitachi</a> AP8000E</li></ul></li>
<li><a href="/facts/RISC-V/pUSKDat1">RISC-V</a></li>
<li><a href="/facts/SPARC/m7KhEtET">SPARC</a> V9 architecture:
<ul><li><a href="/facts/Oracle_Corporation/0z14FygH">Oracle</a>'s M8 and S7 processors and predecessors</li>
<li><a href="/facts/Fujitsu/6e5gvNSa">Fujitsu</a>'s SPARC64 XII and <a href="/facts/SPARC64_V/LSGPFyC9">SPARC64 XIfx</a> processors and predecessors</li></ul></li>
<li><a href="/facts/MIPS_Technologies/eI0XPIYW">MIPS Technologies</a>' <a href="/facts/MIPS_architecture/efV4KgK4">MIPS64</a> architecture</li>
<li><a href="/facts/NEC_SX_architecture/fkSpxKPk">NEC SX architecture</a>
<ul><li><a href="/facts/SX-Aurora_TSUBASA/DRBhNFDU">SX-Aurora TSUBASA</a></li></ul></li>
<li><a href="/facts/Elbrus_(computer)/cFAIaDlB">Elbrus</a> architecture:
<ul><li><a href="/facts/Elbrus-8S/1XmvIkL2">Elbrus-8S</a></li></ul></li>
<li><a href="/facts/ARC_(processor)/oFXJYBNR">ARC</a></li></ul>
Most architectures of 64 bits that are derived from the same architecture of 32 bits can execute code written for the 32-bit versions natively, with no performance penalty. This kind of support is commonly called bi-arch support or more generally multi-arch support.

<h2 id="see-also">See also</h2>
<ul><li><a href="/facts/Computer_memory/hQKVQ51J">Computer memory</a></li></ul>
<h2 id="notes">Notes</h2>

<h2 id="external-links">External links</h2>
<ul><li><a href="https://developer.apple.com/library/mac/documentation/Darwin/Conceptual/64bitPorting/transition/transition.html">64-bit Transition Guide, Mac Developer Library</a></li>
<li>Karpov, Andrey. <a href="https://web.archive.org/web/20210923123351/https://software.intel.com/content/www/us/en/develop/articles/a-collection-of-examples-of-64-bit-errors-in-real-programs.html">"A Collection of Examples of 64-bit Errors in Real Programs"</a>. Archived from <a href="https://software.intel.com/content/www/us/en/develop/articles/a-collection-of-examples-of-64-bit-errors-in-real-programs.html">the original</a> on September 23, 2021.</li>
<li><a href="/facts/Mark_Kilgard/kUqzQvVz">Kilgard, Mark J.</a> <a href="https://web.archive.org/web/20010603003655/https://reality.sgi.com/mjk/64bit/64bit.html">"Is your X code ready for 64-bit?"</a>. Archived from <a href="https://reality.sgi.com/mjk/64bit/64bit.html">the original</a> on June 3, 2001. Retrieved September 26, 2012.</li>
<li><a href="https://web.archive.org/web/20210414000114/https://software.intel.com/content/www/us/en/develop/articles/lessons-on-development-of-64-bit-cc-applications.html">Lessons on development of 64-bit C/C++ applications</a> at the <a href="/facts/Wayback_Machine/nmQ3a6JC">Wayback Machine</a> (archived April 14, 2021)</li>
<li><a href="https://archive.opengroup.org/public/tech/aspen/lp64_wp.htm">64-Bit Programming Models: Why LP64?</a></li>
<li><a href="https://www.codeproject.com/KB/system/AMD64_EM64T_architectur.aspx">AMD64 (EM64T) architecture</a></li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1">such as floating-point numbers. <a href="/wiki/Floating-point_arithmetic" target="_blank">/wiki/Floating-point_arithmetic</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></li>
<li id="fn:2">Pentium Processor User's Manual Volume 1: Pentium Processor Data Book (PDF). Intel. 1993. <a href="https://bitsavers.org/components/intel/pentium/1993_Intel_Pentium_Processor_Users_Manual_Volume_1.pdf" target="_blank">https://bitsavers.org/components/intel/pentium/1993_Intel_Pentium_Processor_Users_Manual_Volume_1.pdf</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></li>
<li id="fn:3">"Cray-1 Computer System Hardware Reference Manual" (PDF). Cray Research. 1977. Retrieved October 8, 2013. <a href="https://bitsavers.trailing-edge.com/pdf/cray/CRAY-1/2240004C_CRAY-1_Hardware_Reference_Nov77.pdf" target="_blank">https://bitsavers.trailing-edge.com/pdf/cray/CRAY-1/2240004C_CRAY-1_Hardware_Reference_Nov77.pdf</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></li>
<li id="fn:4">Grimes, Jack; Kohn, Les; Bharadhwaj, Rajeev (July–August 1989). "The Intel i860 64-Bit Processor: A General-Purpose CPU with 3D Graphics Capabilities". IEEE Computer Graphics and Applications. 9 (4): 85–94. doi:10.1109/38.31467. S2CID 38831149. Retrieved 2010-11-19. <a href="https://www.computer.org/csdl/mags/cg/1989/04/mcg1989040085-abs.html" target="_blank">https://www.computer.org/csdl/mags/cg/1989/04/mcg1989040085-abs.html</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></li>
<li id="fn:5">"i860 Processor Family Programmer's Reference Manual" (PDF). Intel. 1991. Retrieved September 12, 2019. <a href="https://bitsavers.org/components/intel/i860/240875-001_i860_64-Bit_Microprocessor_Programmers_Reference_May91.pdf" target="_blank">https://bitsavers.org/components/intel/i860/240875-001_i860_64-Bit_Microprocessor_Programmers_Reference_May91.pdf</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></li>
<li id="fn:6">"NEC Offers Two High Cost Performance 64-bit RISC Microprocessors" (Press release). NEC. 1998-01-20. Retrieved 2011-01-09. Versions of the VR4300 processor are widely used in consumer and office automation applications, including the popular Nintendo 64™ video game and advanced laser printers such as the recently announced, award-winning Hewlett-Packard LaserJet 4000 printer family. <a href="http://www.nec.co.jp/press/en/9801/2002.htm" target="_blank">http://www.nec.co.jp/press/en/9801/2002.htm</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></li>
<li id="fn:7">MIPS R5000 Microprocessor Technical Backgrounder (PDF), MIPS Technologies, Inc, retrieved 2024-08-19 <a href="http://www.sgidepot.co.uk/depot/R5000_Pr_Ov.pdf" target="_blank">http://www.sgidepot.co.uk/depot/R5000_Pr_Ov.pdf</a> <a href="#fnref:7" class="footnote-back-ref">↩</a></li>
<li id="fn:8">"DDR5 | DRAM". Samsung Semiconductor Global. Retrieved 2025-01-19. <a href="https://semiconductor.samsung.com/dram/ddr/ddr5/" target="_blank">https://semiconductor.samsung.com/dram/ddr/ddr5/</a> <a href="#fnref:8" class="footnote-back-ref">↩</a></li>
<li id="fn:9">"i860 64-Bit Microprocessor". Intel. 1989. Archived from the original on 19 March 2011. Retrieved 30 November 2010. <a href="https://web.archive.org/web/20110319200648/https://smithsonianchips.si.edu/intel/i860.htm" target="_blank">https://web.archive.org/web/20110319200648/https://smithsonianchips.si.edu/intel/i860.htm</a> <a href="#fnref:9" class="footnote-back-ref">↩</a></li>
<li id="fn:10">"Atari Jaguar History". AtariAge. <a href="https://www.atariage.com/Jaguar/history.html" target="_blank">https://www.atariage.com/Jaguar/history.html</a> <a href="#fnref:10" class="footnote-back-ref">↩</a></li>
<li id="fn:11">Joe Heinrich (1994). MIPS R4000 Microprocessor User's Manual (2nd ed.). MIPS Technologies, Inc. <a href="#fnref:11" class="footnote-back-ref">↩</a></li>
<li id="fn:12">Richard L. Sites (1992). "Alpha AXP Architecture". Digital Technical Journal. 4 (4). Digital Equipment Corporation. <a href="#fnref:12" class="footnote-back-ref">↩</a></li>
<li id="fn:13">Gwennap, Linley (3 October 1994). "UltraSparc Unleashes SPARC Performance". Microprocessor Report. 8 (13). MicroDesign Resources. <a href="#fnref:13" class="footnote-back-ref">↩</a></li>
<li id="fn:14">Bishop, J. W.; et al. (July 1996). "PowerPC AS A10 64-bit RISC microprocessor". IBM Journal of Research and Development. 40 (4). IBM Corporation: 495–505. doi:10.1147/rd.404.0495. <a href="/wiki/Doi_(identifier)" target="_blank">/wiki/Doi_(identifier)</a> <a href="#fnref:14" class="footnote-back-ref">↩</a></li>
<li id="fn:15">Gwennap, Linley (14 November 1994). "PA-8000 Combines Complexity and Speed". Microprocessor Report. 8 (15). MicroDesign Resources. <a href="#fnref:15" class="footnote-back-ref">↩</a></li>
<li id="fn:16">F. P. O'Connell; S. W. White (November 2000). "POWER3: The next generation of PowerPC processors". IBM Journal of Research and Development. 44 (6). IBM Corporation: 873–884. doi:10.1147/rd.446.0873. <a href="/wiki/Doi_(identifier)" target="_blank">/wiki/Doi_(identifier)</a> <a href="#fnref:16" class="footnote-back-ref">↩</a></li>
<li id="fn:17">"VIA Unveils Details of Next-Generation Isaiah Processor Core" (Press release). VIA Technologies, Inc. Archived from the original on 2007-10-11. Retrieved 2007-07-18. <a href="https://web.archive.org/web/20071011053054/https://via.com.tw/en/resources/pressroom/2004_archive/pr041005_fpf-isaiah.jsp" target="_blank">https://web.archive.org/web/20071011053054/https://via.com.tw/en/resources/pressroom/2004_archive/pr041005_fpf-isaiah.jsp</a> <a href="#fnref:17" class="footnote-back-ref">↩</a></li>
<li id="fn:18">"ARMv8 Technology Preview" (PDF). October 31, 2011. Archived from the original (PDF) on November 11, 2011. Retrieved November 15, 2012. <a href="https://web.archive.org/web/20111111161327/https://www.arm.com/files/downloads/ARMv8_Architecture.pdf" target="_blank">https://web.archive.org/web/20111111161327/https://www.arm.com/files/downloads/ARMv8_Architecture.pdf</a> <a href="#fnref:18" class="footnote-back-ref">↩</a></li>
<li id="fn:19">"ARM Launches Cortex-A50 Series, the World's Most Energy-Efficient 64-bit Processors" (Press release). ARM Holdings. Retrieved 2012-10-31. <a href="https://www.arm.com/about/newsroom/arm-launches-cortex-a50-series-the-worlds-most-energy-efficient-64-bit-processors.php" target="_blank">https://www.arm.com/about/newsroom/arm-launches-cortex-a50-series-the-worlds-most-energy-efficient-64-bit-processors.php</a> <a href="#fnref:19" class="footnote-back-ref">↩</a></li>
<li id="fn:20">"ARM Keynote: ARM Cortex-A53 and ARM Cortex-A57 64bit ARMv8 processors launched". ARMdevices.net. 2012-10-31. <a href="http://armdevices.net/2012/10/31/arm-keynote-arm-cortex-a53-and-arm-cortex-a57-64bit-armv8-processors-launched/" target="_blank">http://armdevices.net/2012/10/31/arm-keynote-arm-cortex-a53-and-arm-cortex-a57-64bit-armv8-processors-launched/</a> <a href="#fnref:20" class="footnote-back-ref">↩</a></li>
<li id="fn:21">Asanović, Krste; Patterson, David A. (August 6, 2014). Instruction Sets Should Be Free: The Case For RISC-V (PDF). EECS Department, University of California, Berkeley. UCB/EECS-2014-146. <a href="/wiki/Krste_Asanovi%C4%87" target="_blank">/wiki/Krste_Asanovi%C4%87</a> <a href="#fnref:21" class="footnote-back-ref">↩</a></li>
<li id="fn:22">"Synopsys Introduces New 64-bit ARC Processor IP". Archived from the original on 31 March 2022. <a href="https://news.synopsys.com/2020-04-07-Synopsys-Introduces-New-64-bit-ARC-Processor-IP-Delivering-Up-to-3x-Performance-Increase-for-High-End-Embedded-Applications" target="_blank">https://news.synopsys.com/2020-04-07-Synopsys-Introduces-New-64-bit-ARC-Processor-IP-Delivering-Up-to-3x-Performance-Increase-for-High-End-Embedded-Applications</a> <a href="#fnref:22" class="footnote-back-ref">↩</a></li>
<li id="fn:23">Stefan Berka. "Unicos Operating System". www.operating-system.org. Archived from the original on 26 November 2010. Retrieved 2010-11-19. <a href="http://www.operating-system.org/betriebssystem/_english/bs-unicos.htm" target="_blank">http://www.operating-system.org/betriebssystem/_english/bs-unicos.htm</a> <a href="#fnref:23" class="footnote-back-ref">↩</a></li>
<li id="fn:24">Jon "maddog" Hall (Jun 1, 2000). "My Life and Free Software". Linux Journal. <a href="/wiki/Jon_Hall_(programmer)" target="_blank">/wiki/Jon_Hall_(programmer)</a> <a href="#fnref:24" class="footnote-back-ref">↩</a></li>
<li id="fn:25">Andi Kleen. Porting Linux to x86-64 (PDF). Ottawa Linux Symposium 2001. Status: The kernel, compiler, tool chain work. The kernel boots and work on simulator and is used for porting of userland and running programs <a href="https://www.kernel.org/doc/ols/2001/x86-64.pdf" target="_blank">https://www.kernel.org/doc/ols/2001/x86-64.pdf</a> <a href="#fnref:25" class="footnote-back-ref">↩</a></li>
<li id="fn:26">John Siracusa (September 2009). "Mac OS X 10.6 Snow Leopard: the Ars Technica review". Ars Technica. p. 5. Archived from the original on 9 October 2009. Retrieved 2009-09-06. <a href="https://arstechnica.com/apple/reviews/2009/08/mac-os-x-10-6.ars/5" target="_blank">https://arstechnica.com/apple/reviews/2009/08/mac-os-x-10-6.ars/5</a> <a href="#fnref:26" class="footnote-back-ref">↩</a></li>
<li id="fn:27">Joris Evers (5 January 2005). "Microsoft nixes Windows XP for Itanium". Computerworld. Archived from the original on 18 June 2013. Retrieved 17 October 2017. <a href="https://web.archive.org/web/20130618025711/http://www.computerworld.com/s/article/98716/Microsoft_nixes_Windows_XP_for_Itanium?taxonomyId=125" target="_blank">https://web.archive.org/web/20130618025711/http://www.computerworld.com/s/article/98716/Microsoft_nixes_Windows_XP_for_Itanium?taxonomyId=125</a> <a href="#fnref:27" class="footnote-back-ref">↩</a></li>
<li id="fn:28">"Microsoft Raises the Speed Limit with the Availability of 64-Bit Editions of Windows Server 2003 and Windows XP Professional" (Press release). Microsoft. April 25, 2005. Retrieved September 10, 2015. <a href="https://news.microsoft.com/2005/04/25/microsoft-raises-the-speed-limit-with-the-availability-of-64-bit-editions-of-windows-server-2003-and-windows-xp-professional/" target="_blank">https://news.microsoft.com/2005/04/25/microsoft-raises-the-speed-limit-with-the-availability-of-64-bit-editions-of-windows-server-2003-and-windows-xp-professional/</a> <a href="#fnref:28" class="footnote-back-ref">↩</a></li>
<li id="fn:29">John Siracusa (September 2009). "Mac OS X 10.6 Snow Leopard: the Ars Technica review". Ars Technica. p. 5. Archived from the original on 9 October 2009. Retrieved 2009-09-06. <a href="https://arstechnica.com/apple/reviews/2009/08/mac-os-x-10-6.ars/5" target="_blank">https://arstechnica.com/apple/reviews/2009/08/mac-os-x-10-6.ars/5</a> <a href="#fnref:29" class="footnote-back-ref">↩</a></li>
<li id="fn:30">"UEFI on Dell BizClient Platforms" (PDF). <a href="https://uefi.org/sites/default/files/resources/UEFI_on_Dell%20BizClient_Platforms.pdf" target="_blank">https://uefi.org/sites/default/files/resources/UEFI_on_Dell%20BizClient_Platforms.pdf</a> <a href="#fnref:30" class="footnote-back-ref">↩</a></li>
<li id="fn:31">"AMD64 Programmer's Manual Volume 2: System Programming" (PDF). Advanced Micro Devices. March 2024. p. 127. <a href="https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf" target="_blank">https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf</a> <a href="#fnref:31" class="footnote-back-ref">↩</a></li>
<li id="fn:32">"Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide, Part 1" (PDF). Intel. September 2016. p. 4-2. <a href="https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.pdf" target="_blank">https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.pdf</a> <a href="#fnref:32" class="footnote-back-ref">↩</a></li>
<li id="fn:33">"Power ISA Version 3.0". IBM. November 30, 2015. p. 983. <a href="https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0" target="_blank">https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0</a> <a href="#fnref:33" class="footnote-back-ref">↩</a></li>
<li id="fn:34">"Oracle SPARC Architecture 2015 Draft D1.0.9" (PDF). Oracle. November 16, 2016. p. 475. Archived from the original (PDF) on April 22, 2020. <a href="https://web.archive.org/web/20200422022137/https://community.oracle.com/servlet/JiveServlet/downloadBody/1005258-102-3-148654/OracleSparcArchitecture2015.pdf" target="_blank">https://web.archive.org/web/20200422022137/https://community.oracle.com/servlet/JiveServlet/downloadBody/1005258-102-3-148654/OracleSparcArchitecture2015.pdf</a> <a href="#fnref:34" class="footnote-back-ref">↩</a></li>
<li id="fn:35">"ARM Architecture Reference Manual for A-profile architecture". 30 November 2024. section D8.1.6 "Implemented physical address size", section D8.1.8 "Supported virtual address ranges". <a href="https://developer.arm.com/documentation/ddi0487/latest" target="_blank">https://developer.arm.com/documentation/ddi0487/latest</a> <a href="#fnref:35" class="footnote-back-ref">↩</a></li>
<li id="fn:36">Mashey, John (October 2006). "The Long Road to 64 Bits". ACM Queue. 4 (8): 85–94. doi:10.1145/1165754.1165766. <a href="https://doi.org/10.1145%2F1165754.1165766" target="_blank">https://doi.org/10.1145%2F1165754.1165766</a> <a href="#fnref:36" class="footnote-back-ref">↩</a></li>
<li id="fn:37">"Windows 7: 64 bit vs 32 bit?". W7 Forums. 2 April 2009. Archived from the original on 5 April 2009. Retrieved 2009-04-05. <a href="https://www.w7forums.com/threads/windows-7-64-bit-vs-32-bit.484/" target="_blank">https://www.w7forums.com/threads/windows-7-64-bit-vs-32-bit.484/</a> <a href="#fnref:37" class="footnote-back-ref">↩</a></li>
<li id="fn:38">"Frequently Asked Questions About the Java HotSpot VM". Oracle. Retrieved 2024-12-13. <a href="https://www.oracle.com/java/technologies/hotspotfaq.html" target="_blank">https://www.oracle.com/java/technologies/hotspotfaq.html</a> <a href="#fnref:38" class="footnote-back-ref">↩</a></li>
<li id="fn:39">"A description of the differences between 32-bit versions of Windows Vista and 64-bit versions of Windows Vista". Archived from the original on 2011-10-15. Retrieved 2011-10-14. <a href="https://web.archive.org/web/20111015085813/https://support.microsoft.com/kb/946765" target="_blank">https://web.archive.org/web/20111015085813/https://support.microsoft.com/kb/946765</a> <a href="#fnref:39" class="footnote-back-ref">↩</a></li>
<li id="fn:40">Mark Russinovich (2008-07-21). "Pushing the Limits of Windows: Physical Memory". Archived from the original on 2017-04-07. Retrieved 2017-03-09. <a href="https://web.archive.org/web/20170407050448/https://blogs.technet.microsoft.com/markrussinovich/2008/07/21/pushing-the-limits-of-windows-physical-memory/" target="_blank">https://web.archive.org/web/20170407050448/https://blogs.technet.microsoft.com/markrussinovich/2008/07/21/pushing-the-limits-of-windows-physical-memory/</a> <a href="#fnref:40" class="footnote-back-ref">↩</a></li>
<li id="fn:41">Chappell, Geoff (2009-01-27). "Licensed Memory in 32-Bit Windows Vista". geoffchappell.com. WP:SPS. Retrieved 9 March 2017. <a href="http://www.geoffchappell.com/notes/windows/license/memory.htm" target="_blank">http://www.geoffchappell.com/notes/windows/license/memory.htm</a> <a href="#fnref:41" class="footnote-back-ref">↩</a></li>
<li id="fn:42">"Inside Native Applications". Technet.microsoft.com. 2006-11-01. Archived from the original on 23 October 2010. Retrieved 2010-11-19. <a href="https://technet.microsoft.com/en-us/sysinternals/bb897447.aspx" target="_blank">https://technet.microsoft.com/en-us/sysinternals/bb897447.aspx</a> <a href="#fnref:42" class="footnote-back-ref">↩</a></li>
<li id="fn:43">Lincoln Spector (August 12, 2013). "Run an old program on a new PC". <a href="https://www.pcworld.com/article/2045345/run-an-old-program-on-a-new-pc.html" target="_blank">https://www.pcworld.com/article/2045345/run-an-old-program-on-a-new-pc.html</a> <a href="#fnref:43" class="footnote-back-ref">↩</a></li>
<li id="fn:44">Peter Seebach (2006). "Exploring 64-bit development on POWER5: How portable is your code, really?". IBM. <a href="http://www.ibm.com/developerworks/power/library/pa-openpower1/#N100C7" target="_blank">http://www.ibm.com/developerworks/power/library/pa-openpower1/#N100C7</a> <a href="#fnref:44" class="footnote-back-ref">↩</a></li>
<li id="fn:45">Henry Spencer. "The Ten Commandments for C Programmers". <a href="http://www.lysator.liu.se/c/ten-commandments.html" target="_blank">http://www.lysator.liu.se/c/ten-commandments.html</a> <a href="#fnref:45" class="footnote-back-ref">↩</a></li>
<li id="fn:46">"The Story of Thud and Blunder". Datacenterworks.com. Retrieved 2010-11-19. <a href="http://www.datacenterworks.com/stories/thud.html" target="_blank">http://www.datacenterworks.com/stories/thud.html</a> <a href="#fnref:46" class="footnote-back-ref">↩</a></li>
<li id="fn:47">"ILP32 and LP64 data models and data type sizes". z/OS XL C/C++ Programming Guide. <a href="https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.cbcpx01/datatypesize64.htm" target="_blank">https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.cbcpx01/datatypesize64.htm</a> <a href="#fnref:47" class="footnote-back-ref">↩</a></li>
<li id="fn:48">"64-Bit Programming Models". Retrieved 2020-06-05. <a href="http://archive.opengroup.org/public/tech/aspen/lp64_wp.htm" target="_blank">http://archive.opengroup.org/public/tech/aspen/lp64_wp.htm</a> <a href="#fnref:48" class="footnote-back-ref">↩</a></li>
<li id="fn:49">"Using the ILP64 Interface vs. LP64 Interface". Intel. Retrieved Jun 24, 2020. <a href="https://www.intel.com/content/www/us/en/develop/documentation/mkl-linux-developer-guide/top/linking-your-application-with-the-intel-math-kernel-library/linking-in-detail/linking-with-interface-libraries/using-the-ilp64-interface-vs-lp64-interface.html" target="_blank">https://www.intel.com/content/www/us/en/develop/documentation/mkl-linux-developer-guide/top/linking-your-application-with-the-intel-math-kernel-library/linking-in-detail/linking-with-interface-libraries/using-the-ilp64-interface-vs-lp64-interface.html</a> <a href="#fnref:49" class="footnote-back-ref">↩</a></li>
<li id="fn:50">"64-Bit Programming Models". Retrieved 2020-06-05. <a href="http://archive.opengroup.org/public/tech/aspen/lp64_wp.htm" target="_blank">http://archive.opengroup.org/public/tech/aspen/lp64_wp.htm</a> <a href="#fnref:50" class="footnote-back-ref">↩</a></li>
<li id="fn:51">"Cray C/C++ Reference Manual". August 1998. Table 9-1. Cray Research systems data type mapping. Archived from the original on October 16, 2013. Retrieved October 15, 2013. <a href="https://web.archive.org/web/20131016001801/http://docs.cray.com/books/004-2179-001/html-004-2179-001/rvc5mrwh.html" target="_blank">https://web.archive.org/web/20131016001801/http://docs.cray.com/books/004-2179-001/html-004-2179-001/rvc5mrwh.html</a> <a href="#fnref:51" class="footnote-back-ref">↩</a></li>
<li id="fn:52">"Cray C and C++ Reference Manual (8.7) S-2179". Retrieved Jun 24, 2020. <a href="https://pubs.cray.com/content/S-2179/8.7/cray-c-and-c++-reference-manual/about-the-cray-and-c++-reference-manual" target="_blank">https://pubs.cray.com/content/S-2179/8.7/cray-c-and-c++-reference-manual/about-the-cray-and-c++-reference-manual</a> <a href="#fnref:52" class="footnote-back-ref">↩</a></li>
<li id="fn:53">"Abstract Data Models - Windows applications". May 30, 2018. <a href="https://docs.microsoft.com/en-us/windows/desktop/winprog64/abstract-data-models" target="_blank">https://docs.microsoft.com/en-us/windows/desktop/winprog64/abstract-data-models</a> <a href="#fnref:53" class="footnote-back-ref">↩</a></li>
<li id="fn:54">"64-Bit Programming Models". Retrieved 2020-06-05. <a href="http://archive.opengroup.org/public/tech/aspen/lp64_wp.htm" target="_blank">http://archive.opengroup.org/public/tech/aspen/lp64_wp.htm</a> <a href="#fnref:54" class="footnote-back-ref">↩</a></li>
<li id="fn:55">"ILP32 for AArch64 Whitepaper". ARM Limited. June 9, 2015. Archived from the original on December 30, 2018. Retrieved October 9, 2018. <a href="http://infocenter.arm.com/help/topic/com.arm.doc.dai0490a/index.html" target="_blank">http://infocenter.arm.com/help/topic/com.arm.doc.dai0490a/index.html</a> <a href="#fnref:55" class="footnote-back-ref">↩</a></li>
<li id="fn:56">"Apple devices in 2018". woachk, security researcher. October 6, 2018. <a href="https://gist.github.com/woachk/943828f37c14563a607a26116435bf27" target="_blank">https://gist.github.com/woachk/943828f37c14563a607a26116435bf27</a> <a href="#fnref:56" class="footnote-back-ref">↩</a></li>
<li id="fn:57">"Cray C/C++ Reference Manual". August 1998. Table 9-1. Cray Research systems data type mapping. Archived from the original on October 16, 2013. Retrieved October 15, 2013. <a href="https://web.archive.org/web/20131016001801/http://docs.cray.com/books/004-2179-001/html-004-2179-001/rvc5mrwh.html" target="_blank">https://web.archive.org/web/20131016001801/http://docs.cray.com/books/004-2179-001/html-004-2179-001/rvc5mrwh.html</a> <a href="#fnref:57" class="footnote-back-ref">↩</a></li>
<li id="fn:58">"Cray C and C++ Reference Manual (8.7) S-2179". Retrieved Jun 24, 2020. <a href="https://pubs.cray.com/content/S-2179/8.7/cray-c-and-c++-reference-manual/about-the-cray-and-c++-reference-manual" target="_blank">https://pubs.cray.com/content/S-2179/8.7/cray-c-and-c++-reference-manual/about-the-cray-and-c++-reference-manual</a> <a href="#fnref:58" class="footnote-back-ref">↩</a></li>
</ol>

64-bit computing open-in-new

64-bit computing