AT91CAP

AT91CAP (AT91CAP Customizable Atmel Microcontrollers) is a family of <a href="/facts/Atmel/kIDF6tmA">Atmel</a> <a href="/facts/Microcontroller/MKrnAhnm">microcontrollers</a> based on the <a href="/facts/32-bit/TDMVce8s">32-bit</a> <a href="/facts/Reduced_instruction_set_computer/aQbGM62p">RISC</a> microprocessors from <a href="/facts/ARM_architecture/SALsYA79">ARM</a>. They include a block of metal-programmable <a href="/facts/Logic_gate/RHLulvKI">logic gates</a> (MP Block) that can be personalized by the application developer. The MP Block can contain one or more additional <a href="/facts/Central_processing_unit/Jxp1bqMV">processor</a> cores, additional <a href="/facts/Peripheral/3lEBPE14">peripherals</a> or <a href="/facts/Interface_(computer_science)/zdfp8unT">interfaces</a>, or application-specific logic such as a <a href="/facts/Global_Positioning_System/DKVLnzF3">GPS</a> correlator.
CAP products feature embedded <a href="/facts/Static_random_access_memory/Pmyo4V5e">SRAM</a> and <a href="/facts/Read-only_memory/P9QMuDLH">ROM</a> <a href="/facts/Memories/zucwQIEX">memories</a> and an external bus for additional memories including <a href="/facts/Flash_memory/Cn8JsStx">flash memory</a>, together with a number of <a href="/facts/Peripherals/3lEBPE14">peripherals</a> and standard communications and <a href="/facts/Computer_networking/3w5RM99p">networking</a> <a href="/facts/Computer_bus/R45TKwS7">interfaces</a>. This qualifies them as <a href="/facts/System-on-a-chip/1RVvVe6N">system-on-a-chip</a> devices.
External interfaces include <a href="/facts/Universal_Serial_Bus/XcIKWLyg">USB</a>, <a href="/facts/Controller-area_network/EGxoS88W">CAN</a>, <a href="/facts/Ethernet/nMfhU8tU">Ethernet</a>, <a href="/facts/Serial_Peripheral_Interface_Bus/uSCU56eG">SPI</a>, <a href="/facts/USART/6nNL6zox">USART</a> and <a href="/facts/Analog-to-digital_converter/8YYNsMFg">ADC</a>. A <a href="/facts/Direct_memory_access/DWuVgclV">DMA</a> controller provides direct communication channels between external interfaces and memories, increasing <a href="/facts/Data/AUBFN97o">data</a> throughput with minimal processor intervention.
Peripherals include counter/timers, <a href="/facts/Power-on_reset/B0Lh220y">power-on reset</a> generators, <a href="/facts/Voltage_regulator/RWQATaje">voltage regulators</a> and advanced <a href="/facts/Interrupt_controller/0ukSAuF1">interrupt controller</a>. This enhances the <a href="/facts/Real-time_computing/p9HxgL4L">real time</a> performance of the processor. A <a href="/facts/Power_management/fWv2k2sP">power management</a> controller keeps power consumption to a minimum by powering down unused peripherals and interfaces, and enabling the processor to be put in standby mode.
The AT91CAP comes in both <a href="/facts/ARM7TDMI/YQuwF2Lc">ARM7</a> and <a href="/facts/ARM9E/tycMHVAJ">ARM9</a> versions.
The CAP design flow emphasizes parallel <a href="/facts/Computer_hardware/8jSjsCNv">hardware</a>/<a href="/facts/Computer_software/RP79lVSW">software</a> development. An <a href="/facts/Field-programmable_gate_array/M8LSGcAU">FPGA</a>-based <a href="/facts/Emulator/FMHE8qDj">emulation</a> board enables the hardware and software of the application under development to be thoroughly tested at close to full operational speed in order to validate the functionality of the device.

AT91CAP open-in-new

AT91CAP