Northbridge (computing)

<h2 id="overview">Overview</h2>
<p>The northbridge typically handles communications among the <a href="/facts/Central_processing_unit/Jxp1bqMV">CPU</a>, in some cases <a href="/facts/Random-access_memory/DuD4bxh6">RAM</a>, and <a href="/facts/PCI_Express/ADhsLCUK">PCI Express</a> (or <a href="/facts/Accelerated_Graphics_Port/kmrNmn8U">AGP</a>) video cards, and the <a href="/facts/Southbridge_(computing)/K0bg0LSP">southbridge</a>.<a class="footnote-ref" id="fnref:9" href="#fn:9"><sup>9</sup></a><a class="footnote-ref" id="fnref:10" href="#fn:10"><sup>10</sup></a> Some northbridges also contain integrated video controllers, also known as a Graphics and Memory Controller Hub in Intel systems. Because different processors and RAM require different signaling, a given northbridge will typically work with only one or two classes of CPUs and generally only one type of RAM.
</p><p>There are a few chipsets that support two types of RAM; generally, these are made available when there is a shift to a new standard. For example, the northbridge from the 2002 <a href="/facts/Nvidia/8QfCgqbu">Nvidia</a> <a href="/facts/NForce2/4TN1pFeM">nForce2</a> chipset only worked with <a href="/facts/Socket_A/8WDGIcbL">Socket A</a> processors combined with <a href="/facts/DDR_SDRAM/N8UkI3zN">DDR SDRAM</a>.
</p><p>The <a href="/facts/Intel/SMF0gJJX">Intel</a> i875 chipset will only work with systems using <a href="/facts/Pentium_4/6tIFuHIF">Pentium 4</a> processors or <a href="/facts/Celeron/kX00LpnM">Celeron</a> processors that have a clock speed greater than 1.3 GHz and utilize DDR SDRAM, and the Intel i915G chipset only works with the Intel Pentium 4 and the Celeron, but it can use DDR or <a href="/facts/DDR2_SDRAM/DqSMKcPB">DDR2</a> memory.
</p>
<h3>PowerPC</h3>
<p>Northbridge chips are most commonly found on X86-based PCs, but they can also be found on other platforms, such as the <a href="/facts/PowerPC/DqmM9y50">PowerPC</a> platform. A common example of a northbridge on a PowerPC platform is in Apple's older PowerPC-based computers like the <a href="/facts/IMac_G5/clx0EPQE">iMac G5</a>, which utilized an IBM CPC945 Northbridge chip. According to an Apple Developer note, The <a href="/facts/Power_Mac_G5/DfREoJlg">Power Mac G5</a>'s northbridge chip connected to a "Mid Bridge", which then connected to a south bridge.<a class="footnote-ref" id="fnref:11" href="#fn:11"><sup>11</sup></a>
</p>

<h2 id="etymology">Etymology</h2>
<p>The name is derived from drawing the architecture in the fashion of a map. The CPU would be at the top of the map comparable to due north on most general purpose geographical maps. The CPU would be connected to the <a href="/facts/Chipset/0xU3kbVI">chipset</a> via a fast bridge (the northbridge) located north of other system devices as drawn. The northbridge would then be connected to the rest of the chipset via a slow bridge (the southbridge) located south of other system devices as drawn.
</p>

<h2 id="overclocking">Overclocking</h2>
<p>The northbridge plays an important part in how far a computer can be <a href="/facts/Overclocking/wNpjgAFI">overclocked</a>, as its frequency is commonly used as a baseline for the CPU to establish its own operating frequency. This chip typically gets hotter as processor speed becomes faster, requiring more cooling. There is a limit to CPU overclocking, as <a href="/facts/Digital_circuit/vWgfC29C">digital circuits</a> are limited by physical factors such as rise, fall, delay and storage times of the <a href="/facts/Transistor/Bmr8zwL0">transistors</a>, current gain bandwidth product, <a href="/facts/Parasitic_capacitance/xNHYvmoo">parasitic capacitance</a>, and <a href="/facts/Propagation_delay/tUcrAwwe">propagation delay</a>, which increases with (among other factors) <a href="/facts/Operating_temperature/vhFQTpkF">operating temperature</a>; consequently most overclocking applications have software-imposed limits on the <a href="/facts/Frequency_multiplier/cTCG1fu7">multiplier</a> and external clock setting. Additionally, heat is a major limiting factor, as higher voltages are needed to properly activate <a href="/facts/Field_effect_transistors/TerYC6Nz">field effect transistors</a> inside CPUs and this higher voltage produces larger amounts of heat, requiring greater thermal solutions on the die.
</p>
<h2 id="evolution">Evolution</h2>

<p>The overall trend in processor design has been to integrate more functions onto fewer components, which decreases overall motherboard cost and improves performance. The <a href="/facts/Memory_controller/tHq2zlws">memory controller</a>, which handles communication between the CPU and RAM, was moved onto the processor <a href="/facts/Die_(integrated_circuit)/XWvdlltE">die</a> by AMD beginning with their <a href="/facts/AMD_K8/31Fh4soT">AMD K8</a> processors and by Intel with their <a href="/facts/Nehalem_(microarchitecture)/UPsI457h">Nehalem</a> processors. One of the advantages of having the memory controller integrated on the CPU die is to reduce latency from the CPU to memory.
</p><p>Some northbridge chips have supported dual processors, for example Intel's 5000X memory controller used in the original <a href="/facts/Mac_Pro/aS0qSBTl">Mac Pro</a> from 2006.
</p><p>Another example of this kind of change is <a href="/facts/Nvidia/8QfCgqbu">Nvidia</a>'s <a href="/facts/NForce3/nR0UM9Jn">nForce3</a> for <a href="/facts/AMD_K8/31Fh4soT">AMD K8</a> systems. It combines all of the features of a normal <a href="/facts/Southbridge_(computing)/K0bg0LSP">southbridge</a> with an <a href="/facts/Accelerated_Graphics_Port/kmrNmn8U">Accelerated Graphics Port</a> (AGP) port and connects directly to the CPU. On <a href="/facts/NForce4/ChfuaXtS">nForce4</a> boards it was marketed as a media communications processor (MCP).
</p><p><a href="/facts/AMD_Accelerated_Processing_Unit/hdApEUQw">AMD Accelerated Processing Unit</a> processors feature full integration of northbridge functions onto the CPU chip or package, along with processor cores, memory controller, high speed <a href="/facts/PCI_Express/ADhsLCUK">PCI Express</a> interface (usually for graphics card), and integrated graphics processing unit (<a href="/facts/IGPU/PTK1RQVp">iGPU</a>). This was an evolution of the AMD K8, since the memory controller was integrated on the CPU die in the AMD64.
</p><p>The northbridge was replaced by the system agent introduced by the Intel <a href="/facts/Sandy_Bridge/os1WwI9l">Sandy Bridge</a> microarchitecture in 2011, which essentially handles all previous Northbridge functions.<a class="footnote-ref" id="fnref:12" href="#fn:12"><sup>12</sup></a> Intel's Sandy Bridge processors feature full integration of northbridge functions onto the CPU chip, along with processor cores, memory controller, high speed PCI Express interface and integrated <a href="/facts/Graphics_processing_unit/PTK1RQVp">graphics processing unit</a> (GPU). This was a further evolution of the Westmere architecture, which also featured a CPU and GPU <a href="/facts/System_in_package/Tqdpp6hq">in the same package</a>.<a class="footnote-ref" id="fnref:13" href="#fn:13"><sup>13</sup></a>
</p><p>Recent AMD processors starting with the <a href="/facts/Zen_2/pdL7I80c">Zen 2</a> have moved some I/O functions out of the CPU die onto an I/O die on the same <a href="/facts/Multi-chip_module/AzyVaNNp">MCM</a> package as the CPU. This die is not normally considered to be part of the Northbridge, since it is in the same package as the CPU, but it serves some of the same functions.<a class="footnote-ref" id="fnref:14" href="#fn:14"><sup>14</sup></a>
</p>
<h2 id="see-also">See also</h2>
<ul>
<li>Electronics portal</li></ul>
<ul><li><a href="/facts/Intel_Management_Engine/4fwrBrGe">Intel Management Engine</a> (ME)</li></ul>

<h2 id="references">References</h2>

<ol>
<li id="fn:1"><p>"Definition of:Northbridge". PC Magazine. Retrieved September 26, 2015. <a href="https://www.pcmag.com/encyclopedia/term/48076/northbridge" target="_blank">https://www.pcmag.com/encyclopedia/term/48076/northbridge</a> <a href="#fnref:1" class="footnote-back-ref">↩</a></p></li>
<li id="fn:2"><p>"Chipset: Northbridge and Southbridge". Rigacci.org. 2006-01-27. Retrieved 2015-05-07. <a href="http://www.rigacci.org/wiki/doku.php/doc/appunti/hardware/chipset" target="_blank">http://www.rigacci.org/wiki/doku.php/doc/appunti/hardware/chipset</a> <a href="#fnref:2" class="footnote-back-ref">↩</a></p></li>
<li id="fn:3"><p>Kent, Allen (1999). Encyclopedia of computer science and technology. New York, NY [u.a.]: Dekker. p. 500. ISBN 9780824722937. Retrieved September 26, 2015. <a href="9780824722937" target="_blank">9780824722937</a> <a href="#fnref:3" class="footnote-back-ref">↩</a></p></li>
<li id="fn:4"><p>The Macbook Air: A Sign of Things to Come – Digital Gravitas <a href="http://digitalgravitas.wordpress.com/2010/10/25/the-macbook-air-a-sign-of-things-to-come/" target="_blank">http://digitalgravitas.wordpress.com/2010/10/25/the-macbook-air-a-sign-of-things-to-come/</a> <a href="#fnref:4" class="footnote-back-ref">↩</a></p></li>
<li id="fn:5"><p>"Trustworthy x86 laptops? There is a way, says system-level security ace". The Register. Retrieved January 4, 2016. <a href="https://www.theregister.co.uk/2015/12/31/rutkowska_talks_on_intel_x86_security_issues/" target="_blank">https://www.theregister.co.uk/2015/12/31/rutkowska_talks_on_intel_x86_security_issues/</a> <a href="#fnref:5" class="footnote-back-ref">↩</a></p></li>
<li id="fn:6"><p>"Trustworthy x86 laptops? There is a way, says system-level security ace". The Register. Retrieved January 4, 2016. <a href="https://www.theregister.co.uk/2015/12/31/rutkowska_talks_on_intel_x86_security_issues/" target="_blank">https://www.theregister.co.uk/2015/12/31/rutkowska_talks_on_intel_x86_security_issues/</a> <a href="#fnref:6" class="footnote-back-ref">↩</a></p></li>
<li id="fn:7"><p>"Northbridge". Computer Hope. October 7, 2019. <a href="https://www.computerhope.com/jargon/n/northbri.htm" target="_blank">https://www.computerhope.com/jargon/n/northbri.htm</a> <a href="#fnref:7" class="footnote-back-ref">↩</a></p></li>
<li id="fn:8"><p>"Northbridge". Computer Hope. October 7, 2019. <a href="https://www.computerhope.com/jargon/n/northbri.htm" target="_blank">https://www.computerhope.com/jargon/n/northbri.htm</a> <a href="#fnref:8" class="footnote-back-ref">↩</a></p></li>
<li id="fn:9"><p>Jones, George (2004-10-22). "Motherboards & Core-Logic Chipsets: The Deep Stuff | What the North Bridge and South Bridge Do". InformIT.com. Retrieved 2015-05-07. <a href="http://www.informit.com/articles/article.aspx?p=339936" target="_blank">http://www.informit.com/articles/article.aspx?p=339936</a> <a href="#fnref:9" class="footnote-back-ref">↩</a></p></li>
<li id="fn:10"><p>George Jones - Maximum PC 2005 Buyer's Guide - Prentice Hall PTR - ISBN 0-7686-6312-1 <a href="/wiki/ISBN_(identifier)" target="_blank">/wiki/ISBN_(identifier)</a> <a href="#fnref:10" class="footnote-back-ref">↩</a></p></li>
<li id="fn:11"><p>"Power Mac G5 Developer Note". <a href="https://developer.apple.com/library/archive/documentation/Hardware/Conceptual/PowerMac_G5_05Oct/Articles/PwrMacG5-0510_archi.html" target="_blank">https://developer.apple.com/library/archive/documentation/Hardware/Conceptual/PowerMac_G5_05Oct/Articles/PwrMacG5-0510_archi.html</a> <a href="#fnref:11" class="footnote-back-ref">↩</a></p></li>
<li id="fn:12"><p>"The Ring Bus & System Agent - Intel's Sandy Bridge Architecture Exposed". Anandtech.com. Retrieved 2015-05-07. <a href="http://www.anandtech.com/show/3922/intels-sandy-bridge-architecture-exposed/4" target="_blank">http://www.anandtech.com/show/3922/intels-sandy-bridge-architecture-exposed/4</a> <a href="#fnref:12" class="footnote-back-ref">↩</a></p></li>
<li id="fn:13"><p>"Intel Core i5 2500K and Core i7 2600K (Sandy Bridge) - Introduction". Legionhardware.com. Archived from the original on 2016-06-05. Retrieved 2015-05-07. <a href="https://web.archive.org/web/20160605101205/http://www.legionhardware.com/articles_pages/intel_core_i5_2500k_and_core_i7_2600k_sandy_bridge.html" target="_blank">https://web.archive.org/web/20160605101205/http://www.legionhardware.com/articles_pages/intel_core_i5_2500k_and_core_i7_2600k_sandy_bridge.html</a> <a href="#fnref:13" class="footnote-back-ref">↩</a></p></li>
<li id="fn:14"><p>"Chiplets Are the Future, but They Won't Replace Moore's Law". <a href="https://www.extremetech.com/computing/280344-chiplets-are-the-future-but-they-wont-replace-moores-law" target="_blank">https://www.extremetech.com/computing/280344-chiplets-are-the-future-but-they-wont-replace-moores-law</a> <a href="#fnref:14" class="footnote-back-ref">↩</a></p></li>
</ol>

Northbridge (computing) open-in-new

Northbridge (computing)